Abstract: A data driver includes a first latch, a second latch, a digital-to-analog converter, and an output buffer. The first latch sequentially stores first line data in response to a first sampling signal and outputs the stored data in parallel. The second latch sequentially stores second line data in response to a second sampling signal and outputs the stored data in parallel. The digital-to-analog converter converts the parallel data provided from one of the first and second latches to data voltages. The output buffer outputs the data voltages in response to a delay clock.

Abstract: A display device includes a display panel including data lines, gate lines, and pixels connected to the data lines and the gate lines, a data driver configured to drive the data lines, a plurality of gate drivers, each configured to drive a corresponding portion of the gate lines, and a plurality of feedback lines connected to one of the data lines at a plurality of measurement positions corresponding to the plurality of gate drivers. The data driver applies a test voltage to the data line, receives the test voltage as a plurality of feedback voltages through the plurality of feedback lines, and determines gate shift amounts at the plurality of measurement positions corresponding to the plurality of gate drivers based on the plurality of feedback voltages. The gate drivers apply gate signals to the gate lines that are shifted by the determined gate shift amounts.

Abstract: A display device includes a timing controller configured to supply a first set signal to a data control signal line in a first frequency mode, and to supply a second set signal and a data signal to the data control signal line in a second frequency mode that is different from the first frequency mode, a data driver configured to recover the data signal supplied to the data control signal line according to a signal recovery characteristic value, to generate a plurality of data voltages based on the recovered data signal, and to adjust the signal recover characteristic value based on the first set signal and the second set signal, and a display unit including a plurality of pixels that emit lights with gray scales corresponding to the plurality of data voltages

Abstract: A display device including: a display panel including a plurality of pixels; and a data driver configured to arrange the display panel into a plurality of pixel blocks, and to output a data voltage with different slew rates to the plurality of pixel blocks, wherein the slew rates are based on distances of the plurality of pixel blocks from the data driver, wherein a boundary between adjacent pixel blocks with different slew rates is changeable.

Abstract: A display apparatus includes a display panel, a gate driving part, and a data driving part. The display panel is configured to display an image, and includes a gate line and data lines. The gate driving part is configured to output a gate signal to the gate line. The data driving part includes a plurality of data driving integrated circuit parts. Each of the plurality of data driving integrated circuit parts includes channels, configured to output data signals to the data lines, and a dummy data channel. A sensing pin, configured to receive the gate signal, is formed in each dummy data channel.

Abstract: A display device may include a timing controller, a data driver and a plurality of pixels. The timing controller supplies a clock training pattern over a data/clock signal line in a first time period, and supplies pixel/control data over the data/clock signal line in a second time period. The data driver generates a clock signal, using the clock training pattern, in the first period, and generate a plurality of data voltages based on the plurality of pixel data, using the clock signal, in the second period. The plurality of pixels receive the plurality of data voltages and emit corresponding light. During the second period, the data driver outputs a feedback signal to the timing controller indicating that the locking of the clock signal has failed. The timing controller re-supplies the clock training pattern in response to the feedback signal.

Abstract: A data driver includes a first latch, a second latch, a digital-to-analog converter, and an output buffer. The first latch sequentially stores first line data in response to a first sampling signal and outputs the stored data in parallel. The second latch sequentially stores second line data in response to a second sampling signal and outputs the stored data in parallel. The digital-to-analog converter converts the parallel data provided from one of the first and second latches to data voltages. The output buffer outputs the data voltages in response to a delay clock.

Abstract: A method of driving a display panel includes, a data driver outputting a precharge voltage to a plurality of pixels of the display panel during a first duration of a horizontal period, the data driver outputting a grayscale voltage to the pixels of the display panel during a second duration of the horizontal period and the data driver initializing the precharge voltage during the second duration of the horizontal period.

Abstract: A display apparatus includes a display panel, a first driver and a second driver. The display panel includes a plurality of gate lines and a plurality of data lines. The display panel is configured to display an image based on input image data. The first driver is configured to output compensating gate signals having the same timing to the gate lines during a first period and scan gate signals having different timings to the gate lines during a second period. The second driver is configured to apply a compensating data voltage corresponding to a compensating grayscale value to the data lines during the first period and a target data voltage corresponding to a target grayscale value to the data lines during the second period.

Abstract: A liquid crystal display device, including: pixels; data lines and scan lines coupled to the pixels; and a driver configured to supply a scan signal to the scan lines, and supply a data voltage to the data lines. The data lines include first to third data lines, to which a data voltage having a positive polarity is supplied, and which are adjacent to each other, and fourth to sixth data lines, to which a data voltage having a negative polarity is supplied, and which are adjacent to each other.

Abstract: A data driver includes a first data voltage generator, a data converter and a second data voltage generator. The first data voltage generator is configured to generate a first data voltage based on first pixel data and configured to output the first data voltage to a first data line, the first pixel data being generated based on a first gamma curve. The data converter is configured to convert second pixel data to first converted pixel data, the second pixel data being generated based on the first gamma curve, the first converted pixel data being generated based on a second gamma curve different from the first gamma curve. The second data voltage generator is configured to generate a second data voltage based on the first converted pixel data and configured to output the second data voltage to a second data line.

Abstract: A display apparatus includes a display panel, a gate driving part, and a data driving part. The display panel is configured to display an image, and includes a gate line and data lines. The gate driving part is configured to output a gate signal to the gate line. The data driving part includes a plurality of data driving integrated circuit parts. Each of the plurality of data driving integrated circuit parts includes channels, configured to output data signals to the data lines, and a dummy data channel. A sensing pin, configured to receive the gate signal, is formed in each dummy data channel.

Abstract: A display apparatus includes a display panel, a gate driving part, and a data driving part. The display panel is configured to display an image, and includes a gate line and a data line. The gate driving part is configured to output a gate signal to the gate line. The data driving part is configured to output a data signal to the data line. A transition time of the data signal is a time when the data signal transitions from a low level to a high level, and the transition time of the data signal increases according to a decrease of a load of the display panel.

Abstract: A display apparatus includes a display panel and a data driver. The display panel is configured to display an image and includes first through fourth data line groups. The first and second data line groups are adjacent to each other, and the third and fourth data line groups are adjacent to each other. The data driver includes a first data driving circuit configured to output first data voltages to the second data line group later than to the first data line group by a first delay time, and configured to output second data voltages to the fourth data line group later than to the third data line group by a second delay time that is different from the first delay time.

Abstract: A method of driving a display panel includes, a data driver outputting a precharge voltage to a plurality of pixels of the display panel during a first duration of a horizontal period, the data driver outputting a grayscale voltage to the pixels of the display panel during a second duration of the horizontal period and the data driver initializing the precharge voltage during the second duration of the horizontal period.

Abstract: A display device includes a display panel, a gate driver, a data driver, and a driving control unit. The display panel includes pixels connected to a corresponding one of gate lines and a corresponding one of data lines. The gate driver drives the gate lines. The data driver includes first pads and second pads. The first pads are connected to each of first data lines of the data lines, and the second pads are connected to each of second data lines of the data lines. The driving control unit provides control signals and a data signal to the data driver, and to control the gate driver. The data driver includes a digital-to-analog converter and a switching circuit. The digital-to-analog converter converts the data signal into analog signals. The switching circuit sequentially outputs the analog signals to the first pads during a test mode.

Abstract: A display device includes a first interconnection line, a first data driver, a second interconnection line, an electrostatic discharge (ESD) circuit, and a display panel. The first connection line transmits a data driving signal. The first data driver includes the first interconnection line and output a data signal based on the data driving signal. The second interconnection line passes through the first data driver and transmits a gate driving signal. The ESD) circuit in the first data driver and discharges static electricity transmitted through the second interconnection line. The first gate driver outputs a gate signal based on the gate driving signal transmitted through the second interconnection line. The display panel receives the data signal and the gate signal.

Abstract: A scan driver includes stages respectively located in channels, the stages outputting a sampling signal, corresponding to at least one clock signal, and a buffer unit including buffers respectively located between the stages and scan lines, the buffers each outputting a scan signal to an output terminal thereof, corresponding to the sampling signal supplied through an input terminal thereof where an ith (i is a natural number) buffer located in an ith channel is electrically coupled to at least one specific buffer located in another channel different from the ith channel.

Abstract: A data driver includes a first data voltage generator, a data converter and a second data voltage generator. The first data voltage generator is configured to generate a first data voltage based on first pixel data and configured to output the first data voltage to a first data line, the first pixel data being generated based on a first gamma curve. The data converter is configured to convert second pixel data to first converted pixel data, the second pixel data being generated based on the first gamma curve, the first converted pixel data being generated based on a second gamma curve different from the first gamma curve. The second data voltage generator is configured to generate a second data voltage based on the first converted pixel data and configured to output the second data voltage to a second data line.

Abstract: A display panel driving apparatus includes an image pattern analyzing part, a clock signal generating part and a data driving part. The image pattern analyzing part is configured to analyze an image pattern of an image data. The clock signal generating part is configured to generating a clock signal having a different pulse width according to the image pattern of an image data. The data driving part is configured to drive a data line of a display panel in response to the clock signal. Thus, power consumption and heating of the data driving part may be decreased.