Patents by Inventor Sun-Kwang Kim
Sun-Kwang Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200090595Abstract: A display device includes an initialization voltage line to which an initialization voltage is applied, a first driving voltage line to which a first driving voltage is applied, and a pixel connected to the initialization voltage line and the first driving voltage line. The pixel includes a first transistor to control a driving current flowing between a first electrode and a second electrode according to a voltage applied to a first node, a light emitting element between the first transistor and the first driving voltage line, and a first capacitor between the first node and the initialization voltage line. During an initialization period in which the light emitting element is initialized, the initialization voltage is changed from a first level voltage to a second level voltage lower than the first level voltage and the first driving voltage is changed from a first high-level voltage to a first low-level voltage.Type: ApplicationFiled: September 12, 2019Publication date: March 19, 2020Inventors: Jun Hyun PARK, Sun Kwang KIM, Young Wan SEO, Cheol Gon LEE, Yang Hwa CHOI
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Patent number: 10535725Abstract: An organic light emitting display (OLED) device includes a substrate comprising a display region and a peripheral region. The OLED device further includes a conductive layer disposed in the peripheral region on the substrate and including an opening portion exposing at least a portion of the substrate, the conductive layer having an undercut shape. The OLED device additionally includes an insulation layer disposed on the conductive layer, the insulation layer including an opening that exposes the opening portion. The OLED device further includes a common layer disposed in both the display region and the peripheral region on the insulation layer and on the substrate exposed by the opening portion. The common layer disposed on the substrate exposed by the opening portion is spaced apart from the common layer disposed on the insulation layer.Type: GrantFiled: January 4, 2019Date of Patent: January 14, 2020Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Sun-Kwang Kim, Ki-Nyeng Kang, Jin-Koo Kang, Bek-Hyun Lim
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Patent number: 10468534Abstract: A transistor array panel according to an exemplary embodiment includes a substrate, and a first transistor and a second transistor positioned on the substrate. Each of the first transistor and the second transistor includes: a first electrode; a second electrode overlapping the first electrode; a spacing member positioned between the first electrode and the second electrode; a semiconductor layer extending along a side wall of the spacing member; and a gate electrode overlapping the semiconductor layer. A thickness of the spacing member of the first transistor is larger than a thickness of the spacing member of the second transistor.Type: GrantFiled: January 9, 2018Date of Patent: November 5, 2019Assignee: Samsung Display Co., Ltd.Inventors: Bon-Yong Koo, Jung-Hun Noh, Sun Kwang Kim, Yeon Kyung Kim
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Patent number: 10431643Abstract: A display panel includes a signal line extending in a first direction and/or a second direction crossing the first direction, a first transistor electrically connected to the signal line, and including a first active pattern and a first gate electrode, and a first electrode electrically connected to the first transistor. A plurality of openings is defined in the signal line in way such that the signal line transmits an external light therethrough.Type: GrantFiled: November 30, 2016Date of Patent: October 1, 2019Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Ki-Nyeng Kang, Sun-Kwang Kim, Joo-Sun Yoon, Jong-Hyun Choi
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Publication number: 20190294278Abstract: A touch sensor includes a substrate, sensing electrodes (SEs), and sensing lines (SLs). The substrate includes a sensing area (SA) and a peripheral area outside the SA. The SEs overlap the SA. The SLs overlap the peripheral area, are respectively connected to the SEs, and include first SLs (FSLs) alternatingly arranged with second SLs (SSLs). Each of the SLs includes: a first metal layer (FML) on the substrate; a first insulating layer (FIL) on the FML and including a first contact hole (FCH) exposing the FML; and a second metal layer (SML) on the FIL and connected to the FML through the FCH. A width of the FML of each of the FSLs is different from a width of the FML of each of the SSLs. A width of the SML of each of the FSLs is different from a width of the SML of each of the SSLs.Type: ApplicationFiled: November 30, 2018Publication date: September 26, 2019Inventors: Sun Kwang KIM, Ki Nyeng KANG, An Su LEE
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Publication number: 20190157373Abstract: An organic light emitting display (OLED) device includes a substrate comprising a display region and a peripheral region. The OLED device further includes a conductive layer disposed in the peripheral region on the substrate and including an opening portion exposing at least a portion of the substrate, the conductive layer having an undercut shape. The OLED device additionally includes an insulation layer disposed on the conductive layer, the insulation layer including an opening that exposes the opening portion. The OLED device further includes a common layer disposed in both the display region and the peripheral region on the insulation layer and on the substrate exposed by the opening portion. The common layer disposed on the substrate exposed by the opening portion is spaced apart from the common layer disposed on the insulation layer.Type: ApplicationFiled: January 4, 2019Publication date: May 23, 2019Inventors: SUN-KWANG KIM, Kl-NYENG KANG, JIN-KOO KANG, BEK-HYUN LIM
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Patent number: 10199448Abstract: An organic light emitting display (OLED) device includes a substrate comprising a display region and a peripheral region. The OLED device further includes a conductive layer disposed in the peripheral region on the substrate and including an opening portion exposing at least a portion of the substrate, the conductive layer having an undercut shape. The OLED device additionally includes an insulation layer disposed on the conductive layer, the insulation layer including an opening that exposes the opening portion. The OLED device further includes a common layer disposed in both the display region and the peripheral region on the insulation layer and on the substrate exposed by the opening portion. The common layer disposed on the substrate exposed by the opening portion is spaced apart from the common layer disposed on the insulation layer.Type: GrantFiled: June 16, 2017Date of Patent: February 5, 2019Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Sun-Kwang Kim, Ki-Nyeng Kang, Jin-Koo Kang, Bek-Hyun Lim
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Publication number: 20190019462Abstract: A stage circuit includes an output circuit configured to supply, to a first output terminal, a first clock signal supplied to a second input terminal or to supply a voltage of a second power source supplied to a second power input terminal, in response to voltages of a first node and a second node, an input circuit configured to control voltages of a third node and a fourth node in response to a shift pulse or a gate start pulse supplied to a first input terminal, a third clock signal supplied to a third input terminal, and a fourth clock signal supplied to a fourth input terminal, and a first driver configured to control the voltages of the first and second nodes in response to both the third clock signal and the voltages of the third and fourth nodes.Type: ApplicationFiled: April 11, 2018Publication date: January 17, 2019Inventors: Sung Hwan KIM, Bon Yong KOO, Sun Kwang KIM, Chong Chul CHAI
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Patent number: 10147777Abstract: A display device includes: a circuit part including at least one first region and at least one second region disposed adjacent to the first region, wherein the second region includes first pixel circuits arranged adjacent to the first region and second pixel circuits spaced apart from the first region; a display element part disposed on the circuit part, wherein a first display elements are connected to the first pixel circuits and overlap with the first region, and a second display elements are connected to the second pixel circuits; and bridge patterns electrically connecting the first and second pixel circuits and the first and second display elements, wherein the length of bridge patterns connecting the first pixel circuits and the first display elements is different from that of bridge patterns connecting the second pixel circuits and the second display elements.Type: GrantFiled: August 1, 2017Date of Patent: December 4, 2018Assignee: Samsung Display Co., Ltd.Inventors: Bek Hyun Lim, Ki Nyeng Kang, Jin Koo Kang, Sun Kwang Kim
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Publication number: 20180204954Abstract: A transistor array panel according to an exemplary embodiment includes a substrate, and a first transistor and a second transistor positioned on the substrate. Each of the first transistor and the second transistor includes: a first electrode; a second electrode overlapping the first electrode; a spacing member positioned between the first electrode and the second electrode; a semiconductor layer extending along a side wall of the spacing member; and a gate electrode overlapping the semiconductor layer. A thickness of the spacing member of the first transistor is larger than a thickness of the spacing member of the second transistor.Type: ApplicationFiled: January 9, 2018Publication date: July 19, 2018Inventors: Bon-Yong KOO, Jung-Hun NOH, Sun Kwang KIM, Yeon Kyung KIM
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Patent number: 9966424Abstract: An organic light emitting diode display device includes a substrate, a pixel structure, and a wiring pattern. The substrate includes a plurality of pixel regions each having sub-pixel regions and a transparent region. The pixel structure is disposed in the sub-pixel region on the substrate. The wiring pattern is disposed in the transparent region and the sub-pixel region on the substrate, and is electrically connected to the pixel structure. The wiring pattern extends in a first direction that is from the transparent region into the sub-pixel region, and has at least one opening in the transparent region.Type: GrantFiled: July 26, 2016Date of Patent: May 8, 2018Assignee: Samsung Display Co., Ltd.Inventors: Ki-Nyeng Kang, Jong-Hyun Choi, Sun-Kwang Kim
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Publication number: 20180047799Abstract: A display device includes: a circuit part including at least one first region and at least one second region disposed adjacent to the first region, wherein the second region includes first pixel circuits arranged adjacent to the first region and second pixel circuits spaced apart from the first region; a display element part disposed on the circuit part, wherein a first display elements are connected to the first pixel circuits and overlap with the first region, and a second display elements are connected to the second pixel circuits; and bridge patterns electrically connecting the first and second pixel circuits and the first and second display elements, wherein the length of bridge patterns connecting the first pixel circuits and the first display elements is different from that of bridge patterns connecting the second pixel circuits and the second display elements.Type: ApplicationFiled: August 1, 2017Publication date: February 15, 2018Inventors: Bek Hyun LIM, Ki Nyeng KANG, Jin Koo KANG, Sun Kwang KIM
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Publication number: 20170373129Abstract: An organic light emitting display (OLED) device includes a substrate comprising a display region and a peripheral region. The OLED device further includes a conductive layer disposed in the peripheral region on the substrate and including an opening portion exposing at least a portion of the substrate, the conductive layer having an undercut shape. The OLED device additionally includes an insulation layer disposed on the conductive layer, the insulation layer including an opening that exposes the opening portion. The OLED device further includes a common layer disposed in both the display region and the peripheral region on the insulation layer and on the substrate exposed by the opening portion. The common layer disposed on the substrate exposed by the opening portion is spaced apart from the common layer disposed on the insulation layer.Type: ApplicationFiled: June 16, 2017Publication date: December 28, 2017Inventors: SUN-KWANG KIM, Kl-NYENG KANG, JIN-KOO KANG, BEK-HYUN LIM
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Publication number: 20170207289Abstract: A display panel includes a signal line extending in a first direction, a first transistor electrically connected to the signal line, and including a first active pattern and a first gate electrode, and a first electrode electrically connected to the first transistor. A plurality of openings is defined in the signal line in way such that the signal line transmits an external light therethrough.Type: ApplicationFiled: November 30, 2016Publication date: July 20, 2017Inventors: Ki-Nyeng KANG, Sun-Kwang KIM, Joo-Sun YOON, Jong-Hyun CHOI
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Publication number: 20170207288Abstract: An organic light emitting diode display device includes a substrate, a pixel structure, and a wiring pattern. The substrate includes a plurality of pixel regions each having sub-pixel regions and a transparent region. The pixel structure is disposed in the sub-pixel region on the substrate. The wiring pattern is disposed in the transparent region and the sub-pixel region on the substrate, and is electrically connected to the pixel structure. The wiring pattern extends in a first direction that is from the transparent region into the sub-pixel region, and has at least one opening in the transparent region.Type: ApplicationFiled: July 26, 2016Publication date: July 20, 2017Inventors: Ki-Nyeng KANG, Jong-Hyun CHOI, Sun-Kwang KIM
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Patent number: 9570624Abstract: A thin film transistor includes a gate electrode, a gate insulating layer, an oxide semiconductor layer, an oxide buffer layer, a protective layer, and source and drain electrodes. The gate electrode is formed on a substrate. The gate insulating layer is formed on the substrate. The oxide semiconductor layer is formed on the gate insulating layer and includes a source, a channel and a drain region. The oxide buffer layer is formed on the oxide semiconductor layer, and has a carrier concentration lower than that of the oxide semiconductor layer. The protective layer is formed on the oxide buffer layer and the gate insulating layer, and has contact holes formed therein so that the oxide buffer layer in the source and drain regions are exposed therethrough. The source and drain electrodes are coupled with the oxide buffer layer in the source and drain regions through the contact holes.Type: GrantFiled: February 12, 2015Date of Patent: February 14, 2017Assignee: Samsung Display Co., Ltd.Inventors: Woong-Hee Jeong, Sun-Kwang Kim, Hyeon-Sik Kim, Byung-Du Ahn, Chaun-Gi Choi
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Patent number: 9214564Abstract: A thin film transistor (TFT) includes a gate electrode disposed on a substrate. An oxide semiconductor layer is disposed on the gate electrode. An insulation layer is disposed on the oxide semiconductor layer. The insulation layer includes a first contact hole that exposes a first part of the oxide semiconductor layer corresponding to a first end of the gate electrode and a second contact hole that exposes a second part of the oxide semiconductor layer corresponding to an opposite end of the gate electrode. A source electrode is disposed on the insulation layer and contacts the first part of the oxide semiconductor layer through the first contact hole. A drain electrode is disposed on the insulation layer and contacts the second part of the oxide semiconductor layer through the second contact hole.Type: GrantFiled: December 4, 2013Date of Patent: December 15, 2015Assignee: SAMSUNG DISPLAY CO., LTDInventors: Chaun-Gi Choi, Sun-Kwang Kim, Hui-Won Yang, Sang-Il Park
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Publication number: 20150243793Abstract: A thin film transistor includes a gate electrode, a gate insulating layer, an oxide semiconductor layer, an oxide buffer layer, a protective layer, and source and drain electrodes. The gate electrode is formed on a substrate. The gate insulating layer is formed on the substrate. The oxide semiconductor layer is formed on the gate insulating layer and includes a source, a channel and a drain region. The oxide buffer layer is formed on the oxide semiconductor layer, and has a carrier concentration lower than that of the oxide semiconductor layer. The protective layer is formed on the oxide buffer layer and the gate insulating layer, and has contact holes formed therein so that the oxide buffer layer in the source and drain regions are exposed therethrough. The source and drain electrodes are coupled with the oxide buffer layer in the source and drain regions through the contact holes.Type: ApplicationFiled: February 12, 2015Publication date: August 27, 2015Inventors: Woong-Hee Jeong, Sun-Kwang Kim, Hyeon-Sik Kim, Byung-Du Ahn, Chaun-Gi Choi
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Publication number: 20150144952Abstract: A display substrate, method of manufacturing the same, and a display device including the same are disclosed. In one aspect, a display substrate includes a first gate electrode formed on a base substrate, a scan line electrically connected to the first gate electrode, a gate insulation layer, an etch stop layer and a passivation layer formed on the base substrate to at least partially overlap the first gate electrode and the scan line, and a data line formed on the passivation layer to at least partially overlap the scan line.Type: ApplicationFiled: October 22, 2014Publication date: May 28, 2015Inventors: Sun-Kwang Kim, Chaun-Gi Choi, Dong-Han Kang, Jae-Sik Kim, Hyeon-Sik Kim, Woong-Hee Jeong
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Publication number: 20150001484Abstract: A thin film transistor (TFT) includes a gate electrode disposed on a substrate. An oxide semiconductor layer is disposed on the gate electrode. An insulation layer is disposed on the oxide semiconductor layer. The insulation layer includes a first contact hole that exposes a first part of the oxide semiconductor layer corresponding to a first end of the gate electrode and a second contact hole that exposes a second part of the oxide semiconductor layer corresponding to an opposite end of the gate electrode. A source electrode is disposed on the insulation layer and contacts the first part of the oxide semiconductor layer through the first contact hole. A drain electrode is disposed on the insulation layer and contacts the second part of the oxide semiconductor layer through the second contact hole.Type: ApplicationFiled: December 4, 2013Publication date: January 1, 2015Applicant: SAMSUNG DISPLAY CO., LTD.Inventors: CHAUN-GI CHOI, Sun-Kwang Kim, Hui-Won Yang, Sang-Il Park