Abstract: The embodiments of the present disclosure relate to a solid state drive. According to embodiments of the present disclosure, the solid state drive may include a notch fastening part in which a notch connecting the solid state drive and a platform outside the solid state drive is fastened, a coupling part coupled to the socket of the platform, and a bottom plane that is a printed circuit board (PCB) plane that forms a cavity between the top plane of the platform when the coupling part is coupled to the socket of the platform.

Abstract: A memory package includes a package substrate including power wiring and ground wiring. The memory package also includes a memory controller disposed over an upper surface of the package substrate and electrically connected to the power wiring and the ground wiring. The memory package further includes a memory chip disposed over the memory controller and electrically connected to the power wiring and the ground wiring. The memory package additionally includes a band pass filter disposed at one side of the memory controller over the upper surface of the package substrate and including an inductor and a capacitor which are connected in series. The inductor and the capacitor connected in series are electrically connected between the power wiring and the ground wiring.

Abstract: A memory package includes a package substrate including power wiring and ground wiring. The memory package also includes a memory controller disposed over an upper surface of the package substrate and electrically connected to the power wiring and the ground wiring. The memory package further includes a memory chip disposed over the memory controller and electrically connected to the power wiring and the ground wiring. The memory package additionally includes a band pass filter disposed at one side of the memory controller over the upper surface of the package substrate and including an inductor and a capacitor which are connected in series. The inductor and the capacitor connected in series are electrically connected between the power wiring and the ground wiring.

Abstract: A package substrate of a semiconductor package includes second and third pad bonding portions respectively located at both sides of a first pad bonding portion disposed on a substrate body. First to third via landing portions are disposed to be spaced apart from the first to third pad bonding portions. First and second connection trace portions are disposed to be parallel with each other, and a first guard trace portion is disposed to be substantially parallel with the first connection trace portion. The second connection trace portion is connected to the first guard trace portion through a first connection plane portion, and the first connection plane portion connects the second connection trace portion to the second via landing portion. The third pad bonding portion is connected to the third via landing portion through a second connection plane portion.

Abstract: A package substrate of a semiconductor package includes second and third pad bonding portions respectively located at both sides of a first pad bonding portion disposed on a substrate body. First to third via landing portions are disposed to be spaced apart from the first to third pad bonding portions. First and second connection trace portions are disposed to be parallel with each other, and a first guard trace portion is disposed to be substantially parallel with the first connection trace portion. The second connection trace portion is connected to the first guard trace portion through a first connection plane portion, and the first connection plane portion connects the second connection trace portion to the second via landing portion. The third pad bonding portion is connected to the third via landing portion through a second connection plane portion.