Abstract: A semiconductor device includes an isolation structure having first and second sidewalls opposite each other, a first fin-shaped pattern in contact with the first sidewall and extending in the second direction, a second fin-shaped pattern in contact with the second sidewall and extending in the second direction, a first gate electrode on the first fin-shaped pattern, a first source/drain contact on the first and second fin-shaped patterns and extending between the first gate electrode and the element isolation structure, and a wiring structure on and connected to the first source/drain contact, wherein the first source/drain contact includes a lower contact intersecting the first and second fin-shaped patterns, an upper contact protruding from the lower contact, and a dummy contact, the wiring structure being in contact with the upper contact and not with the dummy contact.

Abstract: A semiconductor device includes first and second well regions having a first conductivity type, and a third well region between the first and second well regions having a second conductivity type different from the first conductivity type. A first active region is in the first well region. A second active region is in the second well region. A third active region is in the third well region. The third active region is closer to the second active region than to the first active region. A fourth active region is in the third well region. The fourth active region is closer to the first active region than to the second active region. A first conductive pattern is across the first and third active regions. A second conductive pattern is across the second and fourth active regions and parallel to the first conductive pattern.

Abstract: Semiconductor devices including STI liners are provided. The semiconductor devices may include a STI trench that defines an active region in a substrate, a STI liner that extends conformally along side walls and a bottom surface of the STI trench, a device isolation film that is on the STI liner and fills up at least a part of the STI trench, a first gate structure that is disposed on the active region, and a second gate structure that is spaced apart from the first gate structure. The second gate structure may include a gate insulating film contacting the device isolation film, a gate electrode on the gate insulating film, and spacers on both sides of the gate electrode. Lower surfaces of the spacers may contact an upper surface of the STI liner.

Abstract: A semiconductor device includes first and second well regions having a first conductivity type, and a third well region between the first and second well regions having a second conductivity type different from the first conductivity type. A first active region is in the first well region. A second active region is in the second well region. A third active region is in the third well region. The third active region is closer to the second active region than to the first active region. A fourth active region is in the third well region. The fourth active region is closer to the first active region than to the second active region. A first conductive pattern is across the first and third active regions. A second conductive pattern is across the second and fourth active regions and parallel to the first conductive pattern.

Abstract: A semiconductor device includes first and second well regions having a first conductivity type, and a third well region between the first and second well regions having a second conductivity type different from the first conductivity type. A first active region is in the first well region. A second active region is in the second well region. A third active region is in the third well region. The third active region is closer to the second active region than to the first active region. A fourth active region is in the third well region. The fourth active region is closer to the first active region than to the second active region. A first conductive pattern is across the first and third active regions. A second conductive pattern is across the second and fourth active regions and parallel to the first conductive pattern.

Abstract: A semiconductor device includes a stressor. A device isolation layer is formed on a substrate to define an active region. A gate electrode is formed on the active region. A trench is formed in the active region adjacent to the gate electrode and has first and second sidewalls. A stressor is formed within the trench. The first sidewall of the trench is near the gate electrode and relatively far away from the device isolation layer. The second sidewall of the trench is near the device isolation layer and relatively far away from the gate electrode. The second sidewall of the trench has a step shape.

Abstract: A semiconductor device includes first and second well regions having a first conductivity type, and a third well region between the first and second well regions having a second conductivity type different from the first conductivity type. A first active region is in the first well region. A second active region is in the second well region. A third active region is in the third well region. The third active region is closer to the second active region than to the first active region. A fourth active region is in the third well region. The fourth active region is closer to the first active region than to the second active region. A first conductive pattern is across the first and third active regions. A second conductive pattern is across the second and fourth active regions and parallel to the first conductive pattern.

Abstract: A semiconductor memory device including a substrate, wherein the substrate includes first, second and third well regions, the first well region is disposed between the second and third well regions, the first well region includes a first type conductor and the second and third well regions each include a second type conductor.

Abstract: Disclosed herein is a technique for manufacturing a superconducting tape grown epitaxially by a replication process. According to the technique, a long superconducting tape can be manufactured using a loop-shaped base. Further disclosed is a method for manufacturing a metal oxide device which comprises the steps of forming a solvent-soluble separation layer on a base having a single crystal or textured surface, forming a superconducting layer on the separation layer, forming a support layer on the superconducting layer, and removing the separation layer by dissolution in a solvent. According to the method, it is possible to manufacture a superconducting tape consisting of the superconducting layer and the support layer separated from the bath, and having the same crystallinity as that of the base (replication).

Abstract: Disclosed herein is a technique for manufacturing a superconducting tape grown epitaxially by a replication process. According to the technique, a long superconducting tape can be manufactured using a loop-shaped base. Further disclosed is a method for manufacturing a metal oxide device which comprises the steps of forming a solvent-soluble separation layer on a base having a single crystal or textured surface, forming a superconducting layer on the separation layer, forming a support layer on the superconducting layer, and removing the separation layer by dissolution in a solvent. According to the method, it is possible to manufacture a superconducting tape consisting of the superconducting layer and the support layer separated from the bath, and having the same crystallinity as that of the base (replication).

Abstract: Disclosed herein is a reactive sputtering deposition apparatus in which a partition plate is provided between a sputtering target and a substrate. The reactive sputtering deposition apparatus comprises a deposition chamber for creating an inner process atmosphere of the apparatus, a target including a metal material to be deposited, a substrate on which a reaction product of the metal material separated from the target with a reactive gas is deposited, and a partition plate dividing the deposition chamber into a reaction chamber at the side of the substrate and a sputtering chamber at the side of the target and provided between the target and the substrate, wherein an opening is formed through a central portion of the partition plate to allow the metal material separated from the target to reach the substrate.