Patents by Inventor Sunmin KWON
Sunmin KWON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250023707Abstract: An operation method includes obtaining an input matrix including a coefficient of a polynomial, based on a preprocessing unit (PU), performing a preprocessing operation on the coefficient, based on a first number-theoretic transform (NTT) architecture, performing a first NTT operation on a column element of the input matrix for which the preprocessing operation is completed, performing a Hadamard product operation between a result of the first NTT operation and a twiddle factor, and based on a second NTT architecture, performing a second NTT operation on a row element of the input matrix for which the Hadamard product operation is completed.Type: ApplicationFiled: July 10, 2024Publication date: January 16, 2025Applicants: SAMSUNG ELECTRONICS CO., LTD., Graz University of TechnologyInventors: Ahmet Can MERT, . AIKATA, Sujoy SINHA ROY, Sunmin KWON, Maksim DERIABIN
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Publication number: 20250023708Abstract: An electronic device includes a substrate, an interposer attached to a top of the substrate and comprising a plurality of through-silicon vias (TSVs), a plurality of core chiplets attached to a top of the interposer, and a plurality of memory chiplets attached to the top of the interposer, wherein each of the plurality of core chiplets comprises a number-theoretic transform (NTT) module.Type: ApplicationFiled: July 11, 2024Publication date: January 16, 2025Applicants: Samsung Electronics Co., Ltd., Graz University of TechnologyInventors: Aikata AIKATA, Ahmet Can MERT, Sujoy SINHA ROY, Sunmin KWON, Maksim DERIABIN
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Publication number: 20240348421Abstract: An apparatus includes: one or more memories configured to store an operation key comprising a re-linearization key and ciphertext comprising a plurality of modules; a controller configured to schedule a homomorphic encryption operation based on the ciphertext, based on at least one of the plurality of modules and a modulus of the ciphertext; and a plurality of operation devices configured to parallelly process respective parts of the homomorphic encryption operation according to a result of the scheduling.Type: ApplicationFiled: December 26, 2023Publication date: October 17, 2024Applicants: Samsung Electronics Co., Ltd., Graz University of TechnologyInventors: Anisha MUKHERJEE, Aikata AIKATA, Ahmet Can MERT, Yongwoo LEE, Sunmin KWON, Maksim DERIABIN, Sujoy SINHA ROY
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Publication number: 20240340158Abstract: Disclosed is a homomorphic encryption operation apparatus and method. The homomorphic encryption operation method is performed by a computing device that includes processing hardware and storage hardware, and the method includes: receiving, and storing in the storage hardware, a ciphertext including modules; receiving, and storing in the storage hardware, an operation key including a relinearization key corresponding to the ciphertext; and performing, by the processing hardware, a homomorphic encryption operation on the ciphertext, wherein a modulus of the ciphertext is determined by the processing hardware based on a dimension of the modules and a number of the modules.Type: ApplicationFiled: April 3, 2024Publication date: October 10, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Rakyong CHOI, Andrey KIM, Yongwoo LEE, Hyungchul KANG, Sunmin KWON
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Patent number: 11895224Abstract: A crypto processor, a method of operating a crypto processor, and an electronic device including a crypto processor. A method of operating a crypto processor for performing a polynomial multiplication of lattice-based texts includes transferring coefficients of polynomials for the polynomial multiplication to multipliers, performing multiplications for a portion of the coefficients in parallel using the multipliers, performing an addition for a portion of results of the multiplications using an adder, and determining a result of the polynomial multiplication based on another portion of the results of the multiplications and a result of the addition.Type: GrantFiled: April 19, 2021Date of Patent: February 6, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Youngsam Shin, Sunmin Kwon, Dong-Hoon Yoo
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Publication number: 20230327849Abstract: An apparatus and method with homomorphic encryption are included. An apparatus includes a processor configured to, and/or coupled with a memory storing instructions to configure the processor to: generate, from a ciphertext corresponding to a polynomial having a first degree for performing a homomorphic encryption operation, split polynomials having a second degree by factorizing the polynomial, wherein the split polynomials have a second degree that is less than the first degree, generate partial operation results by performing an element-wise operation using the split polynomials, and generate a homomorphic encryption operation result corresponding to the ciphertext by joining the partial operation results.Type: ApplicationFiled: November 29, 2022Publication date: October 12, 2023Applicants: SAMSUNG ELECTRONICS CO., LTD., Graz University of TechnologyInventors: Ahmet Can MERT, Sujoy SINHA ROY, Aikata, Sunmin KWON, Yongwoo LEE
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Patent number: 11750365Abstract: A method and device for comparing movement paths based on homomorphic encrypted is disclosed, where a server includes a processor configured to collect first encrypted movement path information of a comparison target encrypted by a common key, receive, from a user device, second encrypted movement path information of a user of the user device encrypted by a private key, compare the first encrypted movement path information and the second encrypted movement path information, decrypt a portion of a result of the comparison by the common key to generate a partially decrypted comparison result, and provide the partially decrypted result of the comparison to the user.Type: GrantFiled: June 8, 2021Date of Patent: September 5, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Dong-Hoon Yoo, Sunmin Kwon, Jieun Eom
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Publication number: 20230171084Abstract: An apparatus with homomorphic encryption includes: a first memory configured to receive and store a polynomial; a second memory configured to store a twiddle factor; a number theoretic transform (NTT) module configured to perform an NTT operation on the polynomial based on the twiddle factor; and a controller configured to control the first memory, the second memory, and the NTT module, wherein the NTT module comprises a butterfly unit (BU) array that comprises a plurality of BUs configured to, for the performing of the NTT operation, perform a modular operation on coefficients of the polynomial.Type: ApplicationFiled: October 7, 2022Publication date: June 1, 2023Applicants: Samsung Electronics Co., Ltd., INHA-INDUSTRY PARTNERSHIP INSTITUTEInventors: Sunmin KWON, Hanho LEE, Phap Ngoc DUONG, Dong-Hoon YOO
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Publication number: 20230132500Abstract: Disclosed are apparatuses and methods with crypto processing. Computing devices may be interconnected to each other. Each computing device may be configured to perform polynomial operations based on homomorphic encryption. Memories may be configured to store instructions. Controllers may be configured to transfer instructions from the memories to the computing devices. One or more of the computing devices may each be configured to individually process, in parallel, at least a portion of the polynomial operations based on the homomorphic encryption according to an instruction transferred from a corresponding memory.Type: ApplicationFiled: October 14, 2022Publication date: May 4, 2023Applicants: Samsung Electronics Co., Ltd., Graz University of TechnologyInventors: Sujoy Sinha Roy, Ahmet Can Mert, Aikata, Sunmin Kwon, YOUNGSAM SHIN, DONG-HOON YOO
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Publication number: 20220182220Abstract: A crypto processor, a method of operating a crypto processor, and an electronic device including a crypto processor. A method of operating a crypto processor for performing a polynomial multiplication of lattice-based texts includes transferring coefficients of polynomials for the polynomial multiplication to multipliers, performing multiplications for a portion of the coefficients in parallel using the multipliers, performing an addition for a portion of results of the multiplications using an adder, and determining a result of the polynomial multiplication based on another portion of the results of the multiplications and a result of the addition.Type: ApplicationFiled: April 19, 2021Publication date: June 9, 2022Applicant: SAMSUNG ELECTRONICS CO., LTDInventors: Youngsam SHIN, Sunmin KWON, Dong-Hoon YOO
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Publication number: 20210409189Abstract: A method and device for comparing movement paths based on homomorphic encrypted is disclosed, where a server includes a processor configured to collect first encrypted movement path information of a comparison target encrypted by a common key, receive, from a user device, second encrypted movement path information of a user of the user device encrypted by a private key, compare the first encrypted movement path information and the second encrypted movement path information, decrypt a portion of a result of the comparison by the common key to generate a partially decrypted comparison result, and provide the partially decrypted result of the comparison to the user.Type: ApplicationFiled: June 8, 2021Publication date: December 30, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Dong-Hoon YOO, Sunmin KWON, Jieun EOM
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Patent number: 10068353Abstract: A method of compressing a texture includes receiving a texel block obtained by dividing texels forming a texture into units of blocks of texels, determining a block pattern of the texel block, and compressing the texel block based on the block pattern.Type: GrantFiled: September 22, 2016Date of Patent: September 4, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sunmin Kwon, Hoyoung Kim, Jeongae Park
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Patent number: 10008023Abstract: A method and a device for texture filtering include determining an upper mipmap and a lower mipmap based on a level of detail (LOD) value corresponding to a quad, obtaining first color values corresponding to the upper mipmap, obtaining second color values corresponding to the lower mipmap, and obtaining third color values of the pixels of the quad by using linear interpolation, based on the obtained first and second color values.Type: GrantFiled: May 3, 2016Date of Patent: June 26, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seonghun Jeong, Sangheon Lee, Sunmin Kwon, Hoyoung Kim, Heejun Shim
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Patent number: 9898838Abstract: A method of determining a level of detail (LOD) for a texturing includes: acquiring texture coordinate data on pixels included in an upper block; determining a reference quad among quads included in the upper block; determining a similarity between the determined reference quad and the upper block using texture coordinates of the determined reference quad and the upper block; and determining LODs of remaining quads among the quads included in the upper block to be the same as an LOD of the determined reference quad in response to the determining of the similarity including determining that the determined reference quad and the upper block are similar.Type: GrantFiled: March 18, 2016Date of Patent: February 20, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Heejun Shim, Kwontaek Kwon, Sunmin Kwon, Hoyoung Kim, Seonghun Jeong
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Patent number: 9807400Abstract: An image processing method includes receiving a bitstream comprising a first encoding unit and a second encoding unit; acquiring from the bitstream a reference value for decoding of the first coding unit, a weight value for performing interpolation using the reference value to determine one or more sample values, and an index indicating one of the one or more sample values; decoding the first encoding unit using the index and a result of interpolation performed using the reference value and the weight value; and decoding the second encoding unit from the bitstream using the interpolation result used in the decoding of the first encoding unit.Type: GrantFiled: March 10, 2016Date of Patent: October 31, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jeongae Park, Sunmin Kwon, Kwontaek Kwon
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Patent number: 9721359Abstract: Provided is a decompression apparatus and method thereof for decompressing rendering data. The decompression apparatus includes a data parsing unit configured to acquire a control component and a texture component from compressed input data including rendering information of an object, a decompression controller configured to allocate the control component to a control unit, wherein the control unit extracts a control command from the control component, and a logic calculation unit configured to, based on the control command, restore texture data of the object from the texture component.Type: GrantFiled: March 25, 2015Date of Patent: August 1, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sunmin Kwon, Jeongae Park, Hoyoung Kim, Heejun Shim, Seonghoon Jeong
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Publication number: 20170103565Abstract: A method and a device for texture filtering include determining an upper mipmap and a lower mipmap based on a level of detail (LOD) value corresponding to a quad, obtaining first color values corresponding to the upper mipmap, obtaining second color values corresponding to the lower mipmap, and obtaining third color values of the pixels of the quad by using linear interpolation, based on the obtained first and second color values.Type: ApplicationFiled: May 3, 2016Publication date: April 13, 2017Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seonghun JEONG, Sangheon LEE, Sunmin KWON, Hoyoung KIM, Heejun SHIM
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Publication number: 20170091961Abstract: A method of determining a level of detail (LOD) for a texturing includes: acquiring texture coordinate data on pixels included in an upper block; determining a reference quad among quads included in the upper block; determining a similarity between the determined reference quad and the upper block using texture coordinates of the determined reference quad and the upper block; and determining LODs of remaining quads among the quads included in the upper block to be the same as an LOD of the determined reference quad in response to the determining of the similarity including determining that the determined reference quad and the upper block are similar.Type: ApplicationFiled: March 18, 2016Publication date: March 30, 2017Applicant: Samsung Electronics Co., Ltd.Inventors: Heejun SHIM, Kwontaek KWON, Sunmin KWON, Hoyoung KIM, Seonghun JEONG
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Publication number: 20170084055Abstract: A method of compressing a texture includes receiving a texel block obtained by dividing texels forming a texture into units of blocks of texels, determining a block pattern of the texel block, and compressing the texel block based on the block pattern.Type: ApplicationFiled: September 22, 2016Publication date: March 23, 2017Applicant: Samsung Electronics Co., Ltd.Inventors: Sunmin KWON, Hoyoung KIM, Jeongae PARK
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Publication number: 20170078677Abstract: An image processing method includes receiving a bitstream comprising a first encoding unit and a second encoding unit; acquiring from the bitstream a reference value for decoding of the first coding unit, a weight value for performing interpolation using the reference value to determine one or more sample values, and an index indicating one of the one or more sample values; decoding the first encoding unit using the index and a result of interpolation performed using the reference value and the weight value; and decoding the second encoding unit from the bitstream using the interpolation result used in the decoding of the first encoding unit.Type: ApplicationFiled: March 10, 2016Publication date: March 16, 2017Applicant: Samsung Electronics Co., Ltd.Inventors: Jeongae PARK, Sunmin KWON, Kwontaek KWON