Abstract: In a method for forming a gate in a semiconductor device, a first preliminary gate structure is formed on a substrate. The first preliminary gate structure includes a gate oxide layer, a polysilicon layer pattern and a tungsten layer pattern sequentially stacked on the substrate. A primary oxidation process is performed using oxygen radicals at a first temperature for adjusting a thickness of the gate oxide layer to form a second preliminary gate structure having tungsten oxide. The tungsten oxide is reduced to a tungsten material using a gas containing hydrogen to form a gate structure. The tungsten oxide may not be formed on the gate structure so that generation of the whiskers may be suppressed. Thus, a short between adjacent wirings may not be generated.

Abstract: Methods of forming a semiconductor device may include forming a tunnel oxide layer on a semiconductor substrate, forming a gate structure on the tunnel oxide layer, forming a leakage barrier oxide, and forming an insulating spacer. More particularly, the tunnel oxide layer may be between the gate structure and the substrate, and the gate structure may include a first gate electrode on the tunnel oxide layer, an inter-gate dielectric on the first gate electrode, and a second gate electrode on the inter-gate dielectric with the inter-gate dielectric between the first and second gate electrodes. The leakage barrier oxide may be formed on sidewalls of the second gate electrode. The insulating spacer may be formed on the leakage barrier oxide with the leakage barrier oxide between the insulating spacer and the sidewalls of the second gate electrode. In addition, the insulating spacer and the leakage barrier oxide may include different materials. Related structures are also discussed.

Abstract: A gate structure includes a gate insulation layer on a substrate, a polysilicon layer pattern on the gate insulation layer, a composite metal layer pattern on the polysilicon layer pattern, and a metal silicide layer pattern on a sidewall of the composite metal layer pattern.

Abstract: Methods of forming semiconductor devices are provided. A preliminary gate structure is formed on a semiconductor substrate. The preliminary gate structure includes a gate insulation layer pattern, a polysilicon layer pattern and a conductive layer pattern. A first oxidation process is performed on the preliminary gate structure using an oxygen radical. The first oxidation process is carried out at a first temperature. A second oxidation process is carried out on the oxidized preliminary gate structure to provide a gate structure on the substrate, the second oxidation process being carried out at a second temperature, the second temperature being higher than the first temperature.

Abstract: A semiconductor device includes a first conductive layer on a semiconductor substrate, a dielectric layer including a high-k dielectric material on the first conductive layer, a second conductive layer including polysilicon doped with P-type impurities on the dielectric layer, and a third conductive layer including a metal on the second conductive layer. In some devices, a first gate structure is formed in a main cell region and includes a tunnel oxide layer, a floating gate, a first high-k dielectric layer, and a control gate. The control gate includes a layer of polysilicon doped with P-type impurities and a metal layer. A second gate structure is formed outside the main cell region and includes a tunnel oxide layer, a conductive layer, and a metal layer. A third gate structure is formed in a peripheral cell region and includes a tunnel oxide, a conductive layer, and a high-k dielectric layer having a width narrower than the conductive layer. Method embodiments are also disclosed.

Abstract: A method of fabricating a semiconductor device that includes dual spacers is provided. A nitrogen atmosphere may be created and maintained in a reaction chamber by supplying a nitrogen source gas. A silicon source gas and an oxygen source gas may then be supplied to the reaction chamber to deposit a silicon oxide layer on a semiconductor substrate, which may include a conductive material layer. A silicon nitride layer may then be formed on the silicon oxide layer by performing a general CVD process. Next, the silicon nitride layer may be etched until the silicon oxide layer is exposed. Because of the difference in etching selectivity between silicon nitride and silicon oxide, portions of the silicon nitride layer may remain on sidewalls of the conductive material layer. As a result, dual spacers formed of a silicon oxide layer and a silicon nitride layer may be formed on the sidewalls.

Abstract: In methods of manufacturing semiconductor devices, a preliminary gate oxide layer is formed on a substrate. A surface treatment process is performed on the preliminary gate oxide layer that reduces a diffusion of an oxidizing agent in the preliminary gate oxide layer to form a gate oxide layer on the substrate. A preliminary gate structure is formed on the gate oxide layer. The preliminary gate structure includes a first conductive layer pattern on the gate oxide layer and a second conductive layer pattern on the first conductive layer pattern. An oxidation process is performed on the preliminary gate structure using the oxidizing agent to form an oxide layer on a sidewall of the first conductive layer pattern and on the gate oxide layer, and to round at least one edge portion of the first conductive layer pattern.

Abstract: A method of fabricating a semiconductor device that includes dual spacers is provided. A nitrogen atmosphere may be created and maintained in a reaction chamber by supplying a nitrogen source gas. A silicon source gas and an oxygen source gas may then be supplied to the reaction chamber to deposit a silicon oxide layer on a semiconductor substrate, which may include a conductive material layer. A silicon nitride layer may then be formed on the silicon oxide layer by performing a general CVD process. Next, the silicon nitride layer may be etched until the silicon oxide layer is exposed. Because of the difference in etching selectivity between silicon nitride and silicon oxide, portions of the silicon nitride layer may remain on sidewalls of the conductive material layer. As a result, dual spacers formed of a silicon oxide layer and a silicon nitride layer may be formed on the sidewalls.

Abstract: A method for forming a gate pattern of a semiconductor device can include isotropically etching a gate insulating layer located between a gate conductive layer pattern and a substrate to recess an exposed side wall of the gate insulating layer pattern beyond a lower corner of the gate conductive layer pattern to form an undercut region. The gate conductive layer pattern can be treated to round off the lower corner.

Abstract: A gate electrode of a transistor can include an interface between a polysilicon conformal layer and a tungsten layer thereon in a trench in a substrate and a capping layer extending across the trench and covering the interface. Related methods are also disclosed.

Abstract: In a method of manufacturing a semiconductor device, a gate structure having a conductive layer pattern is formed on a substrate. The gate structure is then annealed. Oxygen radicals are applied to the gate structure to form an oxide layer on a sidewall of the conductive layer pattern.

Abstract: Integrated circuit gates are fabricated by forming an insulated gate on an integrated circuit substrate, wherein the insulated gate includes a gate oxide on the integrated circuit substrate, a polysilicon pattern including polysilicon sidewalls, on the gate oxide, and a metal pattern on the polysilicon pattern. The insulated gate is pretreated with hydrogen and nitrogen gasses. The polysilicon sidewalls are then oxidized. The pretreating in hydrogen and nitrogen gasses prior to oxidizing can reduce growth in thickness of the gate oxide during the oxidizing and/or can reduce formation of whiskers on the metal pattern, compared to absence of the pretreatment.

Abstract: Methods of forming a semiconductor device having a metal gate electrode include sequentially forming a gate insulator, a gate polysilicon layer and a metal-gate layer on a semiconductor substrate. The metal-gate layer and the gate polysilicon layer are sequentially patterned to form a gate pattern comprising a stacked gate polysilicon pattern and a metal-gate pattern. An oxidation barrier layer is formed to cover at least a portion of a sidewall of the metal-gate pattern.

Abstract: Methods of fabricating a semiconductor device having a MOS transistor with a strained channel are provided. The method includes forming a MOS transistor at a portion of a semiconductor substrate. The MOS transistor is formed to have source/drain regions spaced apart from each other and a gate electrode located over a channel region between the source/drain regions. A stress layer is formed on the semiconductor substrate having the MOS transistor. The stress layer is then annealed to convert a physical stress of the stress layer into a tensile stress or increase a tensile stress of the stress layer.

Abstract: A method of manufacturing a semiconductor device having a metal conducting layer is provided. A metal conducting layer pattern having the metal conducting layer is formed on a semiconductor substrate. A portion of the metal conducting layer is partially exposed on the semiconductor substrate. The semiconductor substrate having the metal conducting layer pattern is loaded into a reaction chamber. A first silicon source gas is flowed into the reaction chamber. A silicon oxide layer is formed on the semiconductor substrate having the metal conducting layer pattern by supplying a second silicon source gas and an oxygen source gas into the reaction chamber.

Abstract: A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer structure and may be etched to form insulating spacers on the sidewalls of the metal gate pattern. The capping layer(s) allow the use of a selective oxidation process, which may be a wet oxidation process utilizing partial pressures of both H2O and H2 in an H2-rich atmosphere, to oxidize portions of the substrate and metal gate pattern while suppressing the oxidation of metal layers that may be included in the metal gate pattern. This allows etch damage to the silicon substrate and edges of the metal gate pattern to be reduced while substantially maintaining the original thickness of the gate insulating layer and the conductivity of the metal layer(s).

Abstract: A method of fabricating a semiconductor device that includes dual spacers is provided. A nitrogen atmosphere may be created and maintained in a reaction chamber by supplying a nitrogen source gas. A silicon source gas and an oxygen source gas may then be supplied to the reaction chamber to deposit a silicon oxide layer on a semiconductor substrate, which may include a conductive material layer. A silicon nitride layer may then be formed on the silicon oxide layer by performing a general CVD process. Next, the silicon nitride layer may be etched until the silicon oxide layer is exposed. Because of the difference in etching selectivity between silicon nitride and silicon oxide, portions of the silicon nitride layer may remain on sidewalls of the conductive material layer. As a result, dual spacers formed of a silicon oxide layer and a silicon nitride layer may be formed on the sidewalls.

Abstract: Integrated circuit gates are fabricated by forming an insulated gate on an integrated circuit substrate, wherein the insulated gate includes a gate oxide on the integrated circuit substrate, a polysilicon pattern including polysilicon sidewalls, on the gate oxide, and a metal pattern on the polysilicon pattern. The insulated gate is pretreated with hydrogen and nitrogen gasses. The polysilicon sidewalls are then oxidized. The pretreating in hydrogen and nitrogen gasses prior to oxidizing can reduce growth in thickness of the gate oxide during the oxidizing and/or can reduce formation of whiskers on the metal pattern, compared to absence of the pretreatment.

Abstract: A method of manufacturing a semiconductor device having a metal conducting layer is provided. A metal conducting layer pattern having the metal conducting layer is formed on a semiconductor substrate. A portion of the metal conducting layer is partially exposed on the semiconductor substrate. The semiconductor substrate having the metal conducting layer pattern is loaded into a reaction chamber. A first silicon source gas is flowed into the reaction chamber. A silicon oxide layer is formed on the semiconductor substrate having the metal conducting layer pattern by supplying a second silicon source gas and an oxygen source gas into the reaction chamber.