Abstract: A bladder lesion diagnosis method using a learned neural network, and a system thereof. The bladder lesion diagnosis method using a neural network includes the steps of: receiving a unit pathological image by a bladder lesion diagnosis system; inputting, by the bladder lesion diagnosis system, the unit pathological image into a first neural network to obtain the diagnosis result of a first bladder lesion among a plurality of bladder lesions in the unit pathological image; and inputting, by the bladder lesion diagnosis system, the unit pathological image into a second neural network to obtain the diagnosis result of a second bladder lesion, other than the first bladder lesion, among the plurality of bladder lesions in the unit pathological image.

Abstract: The present invention relates to a method for fabricating a capacitor of a semiconductor device to prevent an occurrence of an operational failure of a capacitor caused by the cleaning steps that follow the process of doping PH3 into an HSG. This improves the quality of the fabricated capacitor and simplifies the operational processes of manufacture. The method includes the steps of forming an insulating interlayer over a semiconductor substrate, forming a buried contact hole in the insulating interlayer to expose a predetermined portion of the semiconductor substrate, forming a lower electrode over the insulating interlayer and in the buried contact hole, performing a first cleaning process, growing an HSG on an exposed portion of the lower electrode, performing a second cleaning process, doping PH3 into the HSG, and forming a dielectric layer over the HSG and the lower electrode.

Abstract: The present invention relates to a method for fabricating a capacitor of a semiconductor device to prevent an occurrence of an operational failure of a capacitor caused by the cleaning steps that follow the process of doping PH3 into an HSG. This improves the quality of the fabricated capacitor and simplifies the operational processes of manufacture. The method includes the steps of forming an insulating interlayer over a semiconductor substrate, forming a buried contact hole in the insulating interlayer to expose a predetermined portion of the semiconductor substrate, forming a lower electrode over the insulating interlayer and in the buried contact hole, performing a first cleaning process, growing an HSG on an exposed portion of the lower electrode, performing a second cleaning process, doping PH3 into the HSG, and forming a dielectric layer over the HSG and the lower electrode.

Abstract: The present invention relates to a method for fabricating a capacitor of a semiconductor device to prevent an occurrence of an operational failure of a capacitor caused by the cleaning steps that follow the process of doping PH3 into an HSG. This improves the quality of the fabricated capacitor and simplifies the operational processes of manufacture. The method includes the steps of forming an insulating interlayer over a semiconductor substrate, forming a buried contact hole in the insulating interlayer to expose a predetermined portion of the semiconductor substrate, forming a lower electrode over the insulating interlayer and in the buried contact hole, performing a first cleaning process, growing an HSG on an exposed portion of the lower electrode, performing a second cleaning process, doping PH3 into the HSG, and forming a dielectric layer over the HSG and the lower electrode.

Abstract: A method of fabricating a capacitor of a semiconductor device maximizes the imurity density of HSG formed at a surface of an electrode of the capacitor and thereby improves capacitance and breakdown voltage characteristics of a DRAM device incorporating the same. The method includes forming an inter-level insulating layer having a buried contact hole which exposes the underlying semiconductor substrate, forming an amorphous polysilicon layer doped with a low density of a p-type impurity on the resultant structure, selectively etching the polysilicon layer with a mask having a pattern configured to form a bottom electrode over a predetermined portion of the inter-level insulating layer which includes the contact hole, causing HSG to grow on the exposed surface of the bottom electrode, and doping PH3 into the HSG under a “low temperature/ high pressure” process condition.

Abstract: A method of depositing a thin film for a semiconductor device using a lamp heating type apparatus. In the method, a wafer is loaded into a processing chamber of the apparatus, and the pressure of the chamber and the temperature of a susceptor installed in the chamber are increased to a level higher than a deposition pressure and a deposition temperature, respectively. Then, the pressure of the chamber and the temperature of the susceptor are decreased to the deposition pressure and the deposition temperature, respectively, and a film is deposited on the wafer. The vacuum of the chamber is then released and the gas remaining in the chamber and a source gas injection tube is purged.