Patents by Inventor Sun-Wung Lee

Sun-Wung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210210353
    Abstract: The present disclosure provides a method of processing a substrate having a polysilicon layer. The substrate is loaded to a processing system. The processing system includes a polishing module and a cleaning module coupled to the polishing module. The polishing module includes at least a first platen and a second platen. Each of the platens includes a polishing pad for polishing the substrate. An abrasive slurry is applied on the first platen of the polishing module to perform planarization of the polysilicon layer. After planarization, the surface polysilicon layer is treated by a non-ionic surfactant solution to change the surface property to hydrophilic. In the post-CMP cleaning process, organic contaminates on the surface of the polysilicon layer are easily removed by HF solution and SC1 solution, without the need of additional H2SO4 cleaning process.
    Type: Application
    Filed: January 7, 2020
    Publication date: July 8, 2021
    Inventor: SUN-WUNG LEE
  • Publication number: 20210114170
    Abstract: The present disclosure provides a container for storing slurry having fumed silica particles. The container includes a main body having an inner space for accommodating the slurry, and a filter disposed in the inner space of the main body. The filter is a porous membrane having a plurality of pores. The filter has an upper surface and a bottom surface. The plurality of pores has a pore size distribution decreasing from the upper surface to the bottom surface.
    Type: Application
    Filed: October 22, 2019
    Publication date: April 22, 2021
    Inventor: SUN-WUNG LEE
  • Publication number: 20200198090
    Abstract: The present disclosure is directed to a method of performing a ceria-based CMP process. In a first action, a slurry containing ceria particles is provided onto a polishing pad. In a second action, an oxide layer of a wafer is polished on the polishing pad by the slurry. In a third action, a cooling water having a temperature within a range of 0° C. to 5° C. is provided onto the polishing pad. In a fourth action, the wafer is polished on the polishing pad by the cooling water to remove the ceria particles from the oxide layer of the wafer.
    Type: Application
    Filed: November 22, 2019
    Publication date: June 25, 2020
    Inventor: SUN-WUNG LEE
  • Publication number: 20200203146
    Abstract: A wafer trimming module is provided. The wafer trimming module includes a holder and a polishing pad. The holder has an opening. The polishing pad is attached to a bottom and a sidewall of the opening. The polishing pad is compressible.
    Type: Application
    Filed: November 1, 2019
    Publication date: June 25, 2020
    Inventor: SUN-WUNG LEE
  • Publication number: 20070232209
    Abstract: An apparatus for polishing a wafer comprises a supporting portion having an abrasive pad disposed thereon, and a polishing head disposed over the abrasive pad. The polishing head comprises a carrier having at least two fluid passages, a retainer ring disposed on a lower edge of the carrier, forming a space for receiving the wafer, a supporter disposed in the carrier, and a flexible membrane disposed to be in contact with the wafer. The supporter has an upper surface portion, a lower surface portion, a plurality of first holes, a plurality of second holes, and a first chamber. The upper surface portion of the supporter forms a second chamber along with an inner surface of the carrier. The second chamber is in communication with one of the two fluid passages of the carrier and the second holes are formed in a lower surface portion of the supporter to communicate with the second chamber.
    Type: Application
    Filed: May 25, 2007
    Publication date: October 4, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Phil Boo, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Patent number: 7223158
    Abstract: An apparatus for polishing a wafer comprises a supporting portion having an abrasive pad disposed thereon, and a polishing head disposed over the abrasive pad. The polishing head comprises a carrier having at least two fluid passages, a retainer ring disposed on a lower edge of the carrier, forming a space for receiving the wafer, a supporter disposed in the carrier, and a flexible membrane disposed to be in contact with the wafer. The supporter has an upper surface portion, a lower surface portion, a plurality of first holes, a plurality of second holes, and a first chamber. The upper surface portion of the supporter forms a second chamber along with an inner surface of the carrier. The second chamber is in communication with one of the two fluid passages of the carrier and the second holes are formed in a lower surface portion of the supporter to communicate with the second chamber.
    Type: Grant
    Filed: January 5, 2006
    Date of Patent: May 29, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Phil Boo, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Patent number: 7081045
    Abstract: An apparatus for polishing a wafer comprises a supporting portion having an abrasive pad disposed thereon, and a polishing head disposed over the abrasive pad. The polishing head comprises a carrier having at least two fluid passages, a retainer ring disposed on a lower edge of the carrier, forming a space for receiving the wafer, a supporter disposed in the carrier, and a flexible membrane disposed to be in contact with the wafer. The supporter has an upper surface portion, a lower surface portion, a plurality of first holes, a plurality of second holes, and a first chamber. The upper surface portion of the supporter forms a second chamber along with an inner surface of the carrier. The second chamber is in communication with one of the two fluid passages of the carrier and the second holes are formed in a lower surface portion of the supporter to communicate with the second chamber.
    Type: Grant
    Filed: February 7, 2005
    Date of Patent: July 25, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Phil Boo, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Publication number: 20060116056
    Abstract: An apparatus for polishing a wafer comprises a supporting portion having an abrasive pad disposed thereon, and a polishing head disposed over the abrasive pad. The polishing head comprises a carrier having at least two fluid passages, a retainer ring disposed on a lower edge of the carrier, forming a space for receiving the wafer, a supporter disposed in the carrier, and a flexible membrane disposed to be in contact with the wafer. The supporter has an upper surface portion, a lower surface portion, a plurality of first holes, a plurality of second holes, and a first chamber. The upper surface portion of the supporter forms a second chamber along with an inner surface of the carrier. The second chamber is in communication with one of the two fluid passages of the carrier and the second holes are formed in a lower surface portion of the supporter to communicate with the second chamber.
    Type: Application
    Filed: January 5, 2006
    Publication date: June 1, 2006
    Inventors: Jae-Phil Boo, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Patent number: 6945861
    Abstract: A chemical mechanical polishing (CMP) apparatus includes a polishing head that is composed of a carrier and a membrane, and is positioned on a polishing pad of a supporting part. The polishing head has a supporter installed at an internal center of the carrier, a chucking ring positioned between the carrier and the supporter, and means for moving the chucking ring up and down in a vertical direction. The supporter forms a sealed space together with the membrane, and the chucking ring chucks the wafer in vacuum.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: September 20, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Phil Boo, Jong-Soo Kim, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Patent number: 6921323
    Abstract: An apparatus for polishing a wafer comprises a supporting portion having an abrasive pad disposed thereon, and a polishing head disposed over the abrasive pad. The polishing head comprises a carrier having at least two fluid passages, a retainer ring disposed on a lower edge of the carrier, forming a space for receiving the wafer, a supporter disposed in the carrier, and a flexible membrane disposed to be in contact with the wafer. The supporter has an upper surface portion, a lower surface portion, a plurality of first holes, a plurality of second holes, and a first chamber. The upper surface portion of the supporter forms a second chamber along with an inner surface of the carrier. The second chamber is in communication with one of the two fluid passages of the carrier and the second holes are formed in a lower surface portion of the supporter to communicate with the second chamber.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: July 26, 2005
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Jae-Phil Boo, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Publication number: 20050153635
    Abstract: A chemical mechanical polishing (CMP) apparatus includes a polishing head that is composed of a carrier and a membrane, and is positioned on a polishing pad of a supporting part. The polishing head has a supporter installed at an internal center of the carrier, a chucking ring positioned between the carrier and the supporter, and means for moving the chucking ring up and down in a vertical direction. The supporter forms a sealed space together with the membrane, and the chucking ring chucks the wafer in vacuum.
    Type: Application
    Filed: March 8, 2005
    Publication date: July 14, 2005
    Inventors: Jae-Phil Boo, Jong-Soo Kim, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Publication number: 20050136806
    Abstract: An apparatus for polishing a wafer comprises a supporting portion having an abrasive pad disposed thereon, and a polishing head disposed over the abrasive pad. The polishing head comprises a carrier having at least two fluid passages, a retainer ring disposed on a lower edge of the carrier, forming a space for receiving the wafer, a supporter disposed in the carrier, and a flexible membrane disposed to be in contact with the wafer. The supporter has an upper surface portion, a lower surface portion, a plurality of first holes, a plurality of second holes, and a first chamber. The upper surface portion of the supporter forms a second chamber along with an inner surface of the carrier. The second chamber is in communication with one of the two fluid passages of the carrier and the second holes are formed in a lower surface portion of the supporter to communicate with the second chamber.
    Type: Application
    Filed: February 7, 2005
    Publication date: June 23, 2005
    Inventors: Jae-Phil Boo, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Patent number: 6881135
    Abstract: A chemical mechanical polishing (CMP) apparatus includes a polishing head that is composed of a carrier and a membrane, and is positioned on a polishing pad of a supporting part. The polishing head has a supporter installed at an internal center of the carrier, a chucking ring positioned between the carrier and the supporter, and means for moving the chucking ring up and down in a vertical direction. The supporter forms a sealed space together with the membrane, and the chucking ring chucks the wafer in vacuum.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: April 19, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Phil Boo, Jong-Soo Kim, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Publication number: 20040242129
    Abstract: A chemical mechanical polishing (CMP) apparatus includes a polishing head that is composed of a carrier and a membrane, and is positioned on a polishing pad of a supporting part. The polishing head has a supporter installed at an internal center of the carrier, a chucking ring positioned between the carrier and the supporter, and means for moving the chucking ring up and down in a vertical direction. The supporter forms a sealed space together with the membrane, and the chucking ring chucks the wafer in vacuum.
    Type: Application
    Filed: June 30, 2004
    Publication date: December 2, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Phil Boo, Jong-Soo Kim, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Patent number: 6769973
    Abstract: A chemical mechanical polishing (CMP) apparatus includes a polishing head that is composed of a carrier and a membrane, and is positioned on a polishing pad of a supporting part. The polishing head has a supporter installed at an internal center of the carrier, a chucking ring positioned between the carrier and the supporter, and means for moving the chucking ring up and down in a vertical direction. The supporter forms a sealed space together with the membrane, and the chucking ring chucks the wafer in vacuum.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: August 3, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Phil Boo, Jong-Soo Kim, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Publication number: 20040072517
    Abstract: An apparatus for polishing a wafer comprises a supporting portion having an abrasive pad disposed thereon, and a polishing head disposed over the abrasive pad. The polishing head comprises a carrier having at least two fluid passages, a retainer ring disposed on a lower edge of the carrier, forming a space for receiving the wafer, a supporter disposed in the carrier, and a flexible membrane disposed to be in contact with the wafer. The supporter has an upper surface portion, a lower surface portion, a plurality of first holes, a plurality of second holes, and a first chamber. The upper surface portion of the supporter forms a second chamber along with an inner surface of the carrier. The second chamber is in communication with one of the two fluid passages of the carrier and the second holes are formed in a lower surface portion of the supporter to communicate with the second chamber.
    Type: Application
    Filed: September 25, 2003
    Publication date: April 15, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Phil Boo, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Patent number: 6652362
    Abstract: An apparatus for polishing a wafer comprises a supporting portion having an abrasive pad disposed thereon, and a polishing head disposed over the abrasive pad. The polishing head comprises a carrier having at least two fluid passages, a retainer ring disposed on a lower edge of the carrier, forming a space for receiving the wafer, a supporter disposed in the carrier, and a flexible membrane disposed to be in contact with the wafer. The supporter has an upper surface portion, a lower surface portion, a plurality of first holes, a plurality of second holes, and a first chamber. The upper surface portion of the supporter forms a second chamber along with an inner surface of the carrier. The second chamber is in communication with one of the two fluid passages of the carrier and the second holes are formed in a lower surface portion of the supporter to communicate with the second chamber.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: November 25, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Phil Boo, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Publication number: 20030008604
    Abstract: A chemical mechanical polishing (CMP) apparatus includes a polishing head that is composed of a carrier and a membrane, and is positioned on a polishing pad of a supporting part. The polishing head has a supporter installed at an internal center of the carrier, a chucking ring positioned between the carrier and the supporter, and means for moving the chucking ring up and down in a vertical direction. The supporter forms a sealed space together with the membrane, and the chucking ring chucks the wafer in vacuum.
    Type: Application
    Filed: March 27, 2002
    Publication date: January 9, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Phil Boo, Jong-Soo Kim, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Publication number: 20020098780
    Abstract: An apparatus for polishing a wafer comprises a supporting portion having an abrasive pad disposed thereon, and a polishing head disposed over the abrasive pad. The polishing head comprises a carrier having at least two fluid passages, a retainer ring disposed on a lower edge of the carrier, forming a space for receiving the wafer, a supporter disposed in the carrier, and a flexible membrane disposed to be in contact with the wafer. The supporter has an upper surface portion, a lower surface portion, a plurality of first holes, a plurality of second holes, and a first chamber. The upper surface portion of the supporter forms a second chamber along with an inner surface of the carrier. The second chamber is in communication with one of the two fluid passages of the carrier and the second holes are formed in a lower surface portion of the supporter to communicate with the second chamber.
    Type: Application
    Filed: June 7, 2001
    Publication date: July 25, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Phil Boo, Jun-Gyu Ryu, Sang-Seon Lee, Sun-Wung Lee
  • Patent number: 6383882
    Abstract: A method for fabricating a MOS transistor using a selective silicide process wherein a gate insulating layer and a gate polysilicon layer are sequentially formed on a silicon substrate, and a gate spacer is formed on a side wall of the gate insulating layer and the gate polysilicon layer. Impurity ions are implanted and diffused using the gate spacer and the gate polysilicon layer as a mask layer to form a source/drain region in the substrate. An etching blocking layer is formed to cover the source/drain region, the gate spacer, and the gate polysilicon layer, and then, a dielectric layer to cover the etching blocking layer is formed. The dielectric layer is planarized, and the etching blocking layer on the gate polysilicon layer is exposed. The exposed etching blocking layer and a part of the gate spacer are etched, and a top surface and a top side of the gate polysilicon layer are exposed. A silicide layer is formed over the exposed part of the gate polysilicon layer.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: May 7, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sun-wung Lee, Jae-phil Boo, Kyung-hyun Kim, Chang-ki Hong