Patents by Inventor Sun Yi

Sun Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240049470
    Abstract: A memory cell array is provided. The memory cell array includes: a plurality of memory cells arranged in a plurality of rows and a plurality of columns; a plurality of word lines electrically connected to the plurality of rows, respectively; a plurality of source lines electrically connected to the plurality of columns, respectively; and a plurality of bit lines electrically connected to the plurality of columns, respectively. A plurality of inactivated word lines are configured to be applied a bias voltage that is zero, and the plurality of source lines are configured to be applied a positive bias voltage.
    Type: Application
    Filed: August 8, 2022
    Publication date: February 8, 2024
    Inventors: Chen-Jun Wu, Sun-Yi Chang, Sheng-Chih Lai, Chung-Te Lin
  • Publication number: 20230372796
    Abstract: A golf club brush is disclosed, the golf club brush includes a brush coupled to a carrier, the carrier being disposed within a housing. The carrier is configured to translate along a housing channel of the housing to be in either a retracted state or an expanded state via a spring disposed therein. In some embodiments, the golf club brush has a detachable brush-element configured to detachably couple to the carrier by a brush fastener. In some embodiments, bristles of the brush element form an angle relative to the carrier. In some embodiments, the carrier forms an angle relative to the housing. Such angles decrease a likelihood of a golf club making contact with an unintended portion of the golf club brush.
    Type: Application
    Filed: May 19, 2023
    Publication date: November 23, 2023
    Inventors: Sang Sun Yi, Michelle Ye-Eun Yi
  • Publication number: 20210301257
    Abstract: The present disclosure describes methods of differentiating cardiomyocyte progenitor cells and mature cardiomyocyte cells from pluripotent stem cells. The methods may include differentiating pluripotent stems cells on a substrate including (i) laminin-511 or 521 and (ii) laminin 221. The mature cardiomyocyte cells produced by the method may form a human heart muscle cell line for use in regenerative cardiology.
    Type: Application
    Filed: April 9, 2021
    Publication date: September 30, 2021
    Inventors: Karl Tryggvason, Yan Wen Yap, Sun Yi, Kristian Tryggvason
  • Patent number: 11001807
    Abstract: The present disclosure describes methods of differentiating cardiomyocyte progenitor cells and mature cardiomyocyte cells from pluripotent stem cells. The methods may include differentiating pluripotent stems cells on a substrate including (i) laminin-511 or 521 and (ii) laminin 221. The mature cardiomyocyte cells produced by the method may form a human heart muscle cell line for use in regenerative cardiology.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: May 11, 2021
    Assignees: NATIONAL UNIVERSITY OF SINGAPORE, BIOLAMINA AB
    Inventors: Karl Tryggvason, Yan Wen Yap, Sun Yi, Kristian Tryggvason
  • Publication number: 20210023427
    Abstract: A golf club brush is disclosed, the golf club brush is configured with a retractable brush element for retractably storing in a housing, the retractable brush element being coupled to a spring-element for accomplishing retractability.
    Type: Application
    Filed: July 22, 2020
    Publication date: January 28, 2021
    Inventors: Sang Sun Yi, Michelle Ye-Eun Yi
  • Patent number: 10844491
    Abstract: A substrate processing system may include a process chamber in which a process on a substrate is performed, a supporting unit in the process chamber to support the substrate, a gas supply unit including a gas supply part with gas supply holes, with the gas supply holes being configured to supply a process gas onto the substrate, and an exhaust unit configured to exhaust the process gas from the process chamber. The gas supply part may include a gas supply region provided with the gas supply holes and a gas diffusion region between the gas supply region and the exhaust unit. The gas diffusion region may be free of the gas supply holes.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: November 24, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sukjin Chung, JongCheol Lee, MinHwa Jung, Jaechul Shin, In-Sun Yi, Geunkyu Choi, Jungil Ahn, Seung Han Lee, Jin Pil Heo
  • Patent number: 10822694
    Abstract: Disclosed are a substrate processing apparatus and a method of cleaning the apparatus. The apparatus includes a process chamber, a support unit in the process chamber and configured to support a substrate, and a gas injection unit in the process chamber. The gas injection unit includes a first injection portion configured to inject a source gas, a second injection portion facing the first injection portion and configured to inject a reaction gas that reacts with the source gas, and a third injection portion configured to inject a cleaning gas that removes a reactant produced from the source gas and the reaction gas.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: November 3, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sukjin Chung, Bongjin Kuh, Kook Tae Kim, In-Sun Yi, Soojin Hong
  • Publication number: 20190055647
    Abstract: Disclosed are a substrate processing apparatus and a method of cleaning the apparatus. The apparatus includes a process chamber, a support unit in the process chamber and configured to support a substrate, and a gas injection unit in the process chamber. The gas injection unit includes a first injection portion configured to inject a source gas, a second injection portion facing the first injection portion and configured to inject a reaction gas that reacts with the source gas, and a third injection portion configured to inject a cleaning gas that removes a reactant produced from the source gas and the reaction gas.
    Type: Application
    Filed: August 17, 2018
    Publication date: February 21, 2019
    Inventors: Sukjin Chung, Bongjin Kuh, Kook Tae Kim, In-Sun Yi, Soojin Hong
  • Publication number: 20170121820
    Abstract: A substrate processing system may include a process chamber in which a process on a substrate is performed, a supporting unit in the process chamber to support the substrate, a gas supply unit including a gas supply part with gas supply holes, with the gas supply holes being configured to supply a process gas onto the substrate, and an exhaust unit configured to exhaust the process gas from the process chamber. The gas supply part may include a gas supply region provided with the gas supply holes and a gas diffusion region between the gas supply region and the exhaust unit. The gas diffusion region may be free of the gas supply holes.
    Type: Application
    Filed: October 10, 2016
    Publication date: May 4, 2017
    Inventors: Sukjin Chung, JongCheol Lee, MinHwa Jung, Jaechul Shin, In-Sun Yi, Geunkyu Choi, Jungil Ahn, Seung Han Lee, Jin Pil Heo
  • Publication number: 20170092480
    Abstract: Provided are gas injection apparatuses, thin-film deposition equipment, and methods for manufacturing a semiconductor device.
    Type: Application
    Filed: January 18, 2016
    Publication date: March 30, 2017
    Inventors: In-Sun YI, Ki-Chul KIM, Jong-Cheol LEE, Kyu-Hee HAN, Jae-Chul SHIN, Min-Hwa JUNG, Yu-Ho Won, Seung-Han LEE, Jin-Pil HEO
  • Publication number: 20160162604
    Abstract: Apparatus and associated methods relate to fitting a virtual mask to a virtual face by first fitting a chin region of the virtual mask to the virtual face, then determining an virtual mask angle that maintains the fitted chin region while simultaneously fitting a nose-bridge region of the virtual mask to the virtual face, and then calculating a fit-quality metric corresponding to the fitted position. In an illustrative embodiment, the fitted chin region may include the high curvature menton region of the chin. In some examples, a virtual mask may be virtually pressed toward the virtual face using a predetermined force corresponding to a force of a mask securing device of a real mask corresponding to the virtual mask In an exemplary embodiment, the fitting of a virtual mask to a virtual face may advantageously yield a mask's fit quality in a brief amount of time.
    Type: Application
    Filed: March 12, 2014
    Publication date: June 9, 2016
    Inventors: Wang Xiaoli, Chen Henry, Sun Yi, Paul Derby, Hari Thiruvengada
  • Publication number: 20160122717
    Abstract: The present disclosure describes methods of differentiating cardiomyocyte progenitor cells and mature cardiomyocyte cells from pluripotent stem cells. The methods may include differentiating pluripotent stems cells on a substrate including (i) laminin-511 or 521 and (ii) laminin 221. The mature cardiomyocyte cells produced by the method may form a human heart muscle cell line for use in regenerative cardiology.
    Type: Application
    Filed: June 2, 2014
    Publication date: May 5, 2016
    Inventors: Karl Tryggvason, Yan Wen Yap, Sun Yi, Kristian Tryggvason
  • Patent number: 9080136
    Abstract: Anionic polymers comprising. organic counterfoils exhibit improved biodegradability. The anionic polymers are useful as antiscalants. The biodegradability of an anionic polymer may be improved by replacing inorganic counterions with organic counterions.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: July 14, 2015
    Assignee: Kemira OYJ
    Inventors: David A. Mortimer, Robert J. Jackson, Sun-Yi Huang
  • Patent number: 8642458
    Abstract: A method of fabricating a nonvolatile memory device includes providing an intermediate structure in which a floating gate and an isolation film are disposed adjacent to each other on a semiconductor substrate and a gate insulating film is disposed on the floating gate and the isolation film, forming a conductive film on the gate insulating film, and annealing the conductive film so that part of the conductive film on an upper portion of the floating gate flows down onto a lower portion of the floating gate and an upper portion of the isolation film.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: February 4, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Hong Chung, Young-Hee Kim, In-Sun Yi, Han-Mei Choi
  • Publication number: 20120315752
    Abstract: A method of fabricating a nonvolatile memory device includes providing an intermediate structure in which a floating gate and an isolation film are disposed adjacent to each other on a semiconductor substrate and a gate insulating film is disposed on the floating gate and the isolation film, forming a conductive film on the gate insulating film, and annealing the conductive film so that part of the conductive film on an upper portion of the floating gate flows down onto a lower portion of the floating gate and an upper portion of the isolation film.
    Type: Application
    Filed: March 7, 2012
    Publication date: December 13, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byung-Hong CHUNG, Young-Hee KIM, In-Sun YI, Han-Mei CHOI
  • Patent number: 8227357
    Abstract: Methods of fabricating a silicon oxide layer using an inorganic silicon precursor and methods of fabricating a semiconductor device using the same are provided. The methods of fabricating a semiconductor device include forming a tunnel insulating layer and a charge storage layer on a substrate; forming a dielectric layer structure on the charge storage layer using an atomic layer deposition (ALD) method, the dielectric layer structure including a first dielectric layer formed of silicon oxide, a second dielectric layer on the first dielectric layer formed of a material different from the material forming the first dielectric layer, and a third dielectric layer formed of the silicon oxide on the second dielectric layer; and forming a control gate on the dielectric layer structure.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: July 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-Sun Yi, Ki-Hyun Hwang, Jin-Tae Noh, Jae-Young Ahn, Si-Young Choi
  • Patent number: 8114735
    Abstract: In a method of manufacturing a non-volatile memory device, a tunnel insulating layer may be formed on a channel region of a substrate. A charge trapping layer including silicon nitride may be formed on the tunnel insulating layer to trap electrons from the channel region. A heat treatment may be performed using a first gas including nitrogen and a second gas including oxygen to remove defect sites in the charge trapping layer and to densify the charge trapping layer. A blocking layer may be formed on the heat-treated charge trapping layer, and a conductive layer may then formed on the blocking layer. The blocking layer, the conductive layer, the heat-treated charge trapping layer and the tunnel insulating layer may be patterned to form a gate structure on the channel region. Accordingly, data retention performance and/or reliability of a non-volatile memory device including the gate structure may be improved.
    Type: Grant
    Filed: September 20, 2007
    Date of Patent: February 14, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Suk Kim, Si-Young Choi, Ki-Hyun Hwang, Han-Mei Choi, Seung-Hwan Lee, Seung-Jae Baik, Sun-Jung Kim, Kwang-Min Park, In-Sun Yi
  • Patent number: 8039951
    Abstract: This invention includes a heat sink structure for use in a semiconductor package that includes a ring structure with down sets and a heat sink connected to the ring structure. The down sets can be slanted or V-shaped. The invention also includes a method of manufacturing a semiconductor package that includes inserting a substrate with an attached semiconductor chip in a first mold portion, placing a heat sink structure on top of a portion of the substrate, placing a mold release film onto a second mold portion, clamping a second mold portion onto a portion of the heat sink structure, injecting an encapsulant into a mold cavity, wherein the encapsulant surrounds portions of the substrate, semiconductor chip and heat sink structure, curing the encapsulant, whereby the heat sink structure adheres to the encapsulant and singulating the encapsulated assembly to form a semiconductor package.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: October 18, 2011
    Assignee: United Test and Assembly Center Ltd.
    Inventors: Kolan Ravi Kanth, Danny Vallejo Retuta, Hien Boon Tan, Anthony Sun-Yi Sheng, Susanto Tanary, Patrick Low Tse Hoong
  • Patent number: 7883938
    Abstract: A method of manufacturing a plurality of stacked die semiconductor packages, including: attaching a second silicon wafer to a first silicon wafer, wherein the second silicon wafer has a plurality of open vias; attaching a third silicon wafer to the second silicon wafer, wherein the third silicon wafer has a plurality of open vias, and the open vias of the second and third silicon wafers are aligned with one another; etching a bonding material that attaches the wafers from the aligned open vias; filling the aligned open vias with a conductor; forming conductive bumps at open ends of the aligned open vias; back grinding the first silicon wafer; separating the stacked semiconductor dies from each other; attaching the bump end of the stacked semiconductor dies onto a substrate; encapsulating the stacked semiconductor dies and substrate; and singulating the encapsulated assembly.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: February 8, 2011
    Assignee: United Test and Assembly Center Ltd.
    Inventors: Ravi Kanth Kolan, Anthony Sun Yi Sheng, Liu Hao, Toh Chin Hock
  • Publication number: 20100248465
    Abstract: Methods of fabricating a silicon oxide layer using an inorganic silicon precursor and methods of fabricating a semiconductor device using the same are provided. The methods of fabricating a semiconductor device include forming a tunnel insulating layer and a charge storage layer on a substrate; forming a dielectric layer structure on the charge storage layer using an atomic layer deposition (ALD) method, the dielectric layer structure including a first dielectric layer formed of silicon oxide, a second dielectric layer on the first dielectric layer formed of a material different from the material forming the first dielectric layer, and a third dielectric layer formed of the silicon oxide on the second dielectric layer; and forming a control gate on the dielectric layer structure.
    Type: Application
    Filed: March 24, 2010
    Publication date: September 30, 2010
    Inventors: In-Sun Yi, Ki-Hyun Hwang, Jin-Tae Noh, Jae-Young Ahn, Si-Young Choi