Abstract: Elements necessary for a digital television receiver are structured as a plurality of digital signal processing blocks and a host operation processing block. The blocks are connected through a general-purpose bus. Command for controlling the operations of the blocks and data of streams are transferred through the bus. Thus, by replacing only blocks, various types of digital television broadcasts that differ in carrier waves, modulating systems, and compressing systems can be handled. Consequently, the developing efficiency of a television receiver is improved. In addition, when a new service is started, by adding hardware for the service, the service can be easily handled.

Abstract: Elements necessary for a digital television receiver are structured as blocks that are a plurality of digital signal processing blocks and a host arithmetic operation processing block. The blocks are connected through a general-purpose bus. Commands for controlling operations of the blocks and data of streams are transferred through the bus. An extension plug-in card for a new service can be attached and detached to/from the bus. The extension plug-in card has hardware that accomplishes an extension function and a script for commands of the hardware. When the extension plug-in card is attached to the bus through an interface, the script for the commands is automatically uploaded to the host arithmetic operation processing block side. The host arithmetic operation processing block can operate the extension plug-in card corresponding to the transferred script for the commands.

Abstract: The present invention is a multi-function receiver that controls a plurality of graphic user interface displays. The receiver includes a first display processing section for performing graphic display processing based on a program stored in a memory, a second display processing section for performing graphic display processing based on a control signal included in a signal for a channel being received, and a control section connected to the memory for controlling the first and second display processing sections. The control section performs control so to display a graphic screen display-processed by one of the first and second display processing sections. Thereby, the graphic screen display-processed by the first display processing section and the graphic screen display-processed by the second display processing section can be prevented from being overlapped and moreover, the conventional control program used in the first display processing section can be utilized as it is, without being changed.

Abstract: Elements necessary for a digital television receiver are structured as a plurality of digital signal processing blocks and a host arithmetic operation processing block. The blocks are connected through a general purpose bus. Commands for controlling operations of the blocks and data of a stream are transferred through the bus. When an encryption encoder/decode is disposed in each block, contents transferred through the bus can be protected. When an encryption encoder/decode circuit is disposed in an interface to which an extension plug-in card is attached, contents that are output from the interface can be protected.

Abstract: A television receiver apparatus has large versatility to adapt itself to newly offered services or new modes of use. An external memory element loaded with a flash memory is connected to the receiver apparatus through an external memory interface having a connector and an interface circuit. The external memory element stores information such as a program for implementing an additional function or data such as video and audio data. The information stored in the external memory element is taken up by the receiver apparatus through the external memory interface. The information from the external memory element is processed by a controlling portion of the receiver apparatus so as to be subjected to use.

Abstract: A decoder has a DRAM used as a work area in processing such as decompression and an MPEG decoder including an OSD processing unit. The MPEG decoder has a function to decompress data completing MPEG compression and a graphic function to display information such as an EPG (Electronic Program Guide). A control unit generates display data from presentation information conveyed by a digital television broadcast by using the OSD processing unit employed in the MPEG decoder and the DRAM in order to display the presentation information. With such a decoder, it is possible to provide a receiver with a new function to use presentation information conveyed by a digital television broadcast without entailing an increase in cost.

Abstract: A television receiver apparatus has large versatility to adapt itself to newly offered services or new modes of use. An external memory element loaded with a flash memory is connected to the receiver apparatus through an external memory interface having a connector and an interface circuit. The external memory element stores information such as a program for implementing an additional function or data such as video and audio data. The information stored in the external memory element is taken up by the receiver apparatus through the external memory interface. The information from the external memory element is processed by a controlling portion of the receiver apparatus so as to be subjected to use.

Abstract: A micro-controller integrated on a single substrate and which includes a read-only information memory for storing firmware, an address controller for performing address control, and an input port for inputting information supplied thereto from a source external to the substrate further incorporates a correcting information storage memory for receiving correcting information input thereto from the source external to the substrate through the input port and storing the correcting information upon an initialization of the micro-controller, wherein the correcting information is indicative of a modification for a defective information part stored in the read-only information storage memory, and a switching circuit for selectively switching the access by the address controller from the defective information part in the read-only information storage memory to the correcting information in the correcting information storage memory.

Abstract: An electronic apparatus incorporating a microcomputer capable of correcting bugs by means of patches. The microcomputer circumvents serious trouble which would usually be produced due to bugs when the power supply is turned on. After the power supply is turned on and initialization of the microcomputer itself is complete, it is determined whether the initialization processing for correcting by patches has ended. If this processing has not yet ended, the microcomputer is inhibited from controlling certain objects (e.g., circuits for driving motors that control the tape transport mechanism of a video camera) which would cause serious trouble if they were to malfunction. The microcomputer control of other objects is not so inhibited. After the end of the initialization for correcting by patches, a program capable of correcting by patches is executed.

Abstract: A unitary electronic device includes a CPU, a RAM, a ROM for storing a processing program for the CPU which program includes a command to execute, at each processing cycle of the CPU, the processing located at a predetermined address in the RAM, and an input means or the like, for entering in the RAM at the predetermined address, information for correcting a defect in the processing program stored in the ROM.

Abstract: An electronic device having an integrated structure including central processing means for performing an access control to storage means, a calculation processing, etc., fixed storage means, input means for inputting correction information for correcting information of a specific part stored in the fixed storage means, correction information storage means for storing the correction information input from the input means, and change-over means for switching the access by the central processing means from an area in which a specific part of the information in the fixed storage means is stored, from the fixed storage means to the correction information storage means. The correction information includes at least batch correction data for correcting the information of the specific part and a parameter for calculating a storage position of the batch correction data in the correction information storage means.