Abstract: An integrated circuit module, a land grid array module, and a method for forming the module, include a substrate, which mounts one or more chips or discrete electronic components, and a cap for covering the substrate, and including at least one protrusion coupled to the cap for limiting the amount of flexing of the substrate during actuation. The at least one protrusion can be either rigidly fixed to the cap or adjustably inserted through the cap.

Abstract: An integrated circuit module, a land grid array module, and a method for forming the module, include a substrate, which mounts one or more chips or discrete electronic components, and a cap for covering the substrate, and including at least one protrusion coupled to the cap for limiting the amount of flexing of the substrate during actuation. The at least one protrusion can be either rigidly fixed to the cap or adjustably inserted through the cap.

Abstract: An integrated circuit module, a land grid array module, and a method for forming the module, include a substrate, which mounts one or more chips or discrete electronic components, and a cap for covering the substrate, and including at least one protrusion coupled to the cap for limiting the amount of flexing of the substrate during actuation. The at least one protrusion can be either rigidly fixed to the cap or adjustably inserted through the cap.

Abstract: Disclosed is a multilayer ceramic substrate having an outer pad, for example an I/O pad, which is anchored to a middle pad of the multilayer ceramic substrate by a plurality of vias which in turn is anchored to an inner pad of the multilayer ceramic substrate by a second plurality of vias. The middle and outer pads and vias are made of high metal material, preferably 100% metal, so they won't adhere very well to the ceramic substrate. The inner pad is a composite metal/ceramic material which will bond very well to the ceramic substrate.

Abstract: A high performance TF-ceramic module for mounting integrated circuit chips thereto and a method of fabricating the module at reduced cost. The substrate includes thin film (TF) layers formed directly on a layered ceramic base. A first thick film wiring layer is formed on or embedded in a top surface of the thick film layered ceramic base using thick film techniques. A first dielectric layer of a polyimide or other organic material, or an insulating material different than the ceramic material is formed on top of the first wiring layer. The dielectric layer may be spun on or sprayed on and baked; vapor deposited; laminated to the ceramic base; or an inorganic layer may be deposited using plasma enhanced chemical vapor deposition (PECVD). Vias are formed through the first dielectric layer. A second wiring layer is formed on the first dielectric layer. A second dielectric layer is formed on the second wiring layer.

Abstract: Multilayer glass ceramic substrate electronic components having enhanced flexibility and strength are prepared using greensheets as a top and/or bottom layer, which greensheets are made from a glass-ceramic greensheet casting composition comprising crystallizable glass, a binder resin and a solvent system, and preferably a plasticizer. The top and/or bottom greensheets have a lower coefficient of thermal expansion (CTE) than the greensheets used to make the internal layers of the MLC and both greensheets are characterized by having, after sintering, a microstructure which is greater than 99% crystalline. A crystalline matrix forming material such as P2O5 is preferably used in the composition. This type structure, in combination with the lower CTE, has been found to provide an MLC having enhanced strength and flexibility.

Abstract: Disclosed is a multilayer ceramic substrate having an outer pad, for example an I/O pad, which is anchored to an inner pad of the multilayer ceramic substrate by either a plurality of vias or one large via. The outer pad and vias are made of high metal material, preferably 100% metal, so they won't adhere very well to the ceramic substrate. The inner pad is a composite metal/ceramic material which will bond very well to the ceramic substrate.

Abstract: A method for making multilayer ceramic substrates having substantially reduced planar shrinkage and distortion resulting from the firing or sintering process. Contact sheets are employed in the fabrication process on the surface of the multilayer ceramic substrate to be fired with the contact sheets being prepared from a composition containing a non-sinterable non-metallic inorganic material such as alumina having an average particle size approximately about 1 micron or less and an organic binder and preferably a plasticizer. In a preferred embodiment of the invention, the multilayer structure to be fired containing the contact sheet of the invention is provided with a beveled or chamfered edge at an angle of greater than about 60 degrees. A fabrication process employing only chamfering of the edge or the use of a contact sheet of the invention also provides improved multilayer ceramic substrate products.

Abstract: Disclosed is a multilayer ceramic substrate, and a method for forming same, which has an outer unsealed layer having a metallic via, an inner sealed layer having a composite via of metallic and ceramic materials and a further unsealed layer having a metallic via.

Abstract: A high performance TF-ceramic module for mounting integrated circuit chips thereto and a method of fabricating the module at reduced cost. The substrate includes thin film (TF) layers formed directly on a layered ceramic base. A first thick film wiring layer is formed on or embedded in a top surface of the thick film layered ceramic base using thick film techniques. A first dielectric layer of a polyimide or other organic material, or an insulating material different than the ceramic material is formed on top of the first wiring layer. The dielectric layer may be spun on or sprayed on and baked; vapor deposited; laminated to the ceramic base; or an inorganic layer may be deposited using plasma enhanced chemical vapor deposition (PECVD). Vias are formed through the first dielectric layer. A second wiring layer is formed on the first dielectric layer. A second dielectric layer is formed on the second wiring layer.