Patents by Inventor Sundar Narayanan

Sundar Narayanan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12672489
    Abstract: Resistive switching memory cells having filament-based switching mechanisms are provided. By way of example, resistive switching memory cells having resistive filaments constrained to a core of the cell are disclosed. In other examples, methods for fabricating resistive switching memory cells to constrain a conductive filament formed in the resistive switching memory cell to a central portion of core of the cell are disclosed.
    Type: Grant
    Filed: May 28, 2024
    Date of Patent: June 30, 2026
    Assignee: Crossbar, Inc.
    Inventors: Sundar Narayanan, Wee Chen Gan, Natividad Vasquez, Jr., Wei Ti Lee
  • Publication number: 20260073139
    Abstract: Systems, methods, and other embodiments associated with a framework for multi-entity detection, data sourcing, and processing are described. In one embodiment, a multi-entity processing method includes parsing an electronic document being processed in a processing flow for a first entity to detect that the document also concerns a second entity based on entity identifiers in the document. In response to the detection, the method determines an inter-entity agreement that governs processing between the first entity and second entity by matching attributes of the document against stored agreement data structures. The method automatically orchestrates processing of an inter-entity transaction between the first entity and the second entity by generating execution steps according to sequential and parallel dependencies specified by the inter-entity agreement.
    Type: Application
    Filed: September 5, 2025
    Publication date: March 12, 2026
    Inventors: Shyam Sundar SANTHANAM, Francesca W. AMEZQUITA, Sundar NARAYANAN, Josefina BRADBURY, Mannu SACHDEVA, Ashish KUMAR, Saurabh KUMAR, Mani Kanth NANDA
  • Publication number: 20260064696
    Abstract: Techniques are described herein for implementing, deploying, and utilizing an in-memory information access framework for enterprise data using highly-resolved, semantically-complete, read-only data objects. Extraction workloads efficiently access enterprise data without incurring significant performance degradation to transaction entry workloads. Consumers access enterprise information in a user-intelligible fashion without any knowledge of the underlying data storage and relationship details of complex physical schema designs. Consumers access subsets of the read-only data objects by defining reusable and parametrized data slices. Consumers combine related data slices into data slice collections. Initially, the system receives a request for a dataset by specifying a data slice. The system accesses metadata for an object or view associated with the data slice to determine operations for accessing the requested dataset. The system generates a database query for retrieving the requested dataset.
    Type: Application
    Filed: April 22, 2025
    Publication date: March 5, 2026
    Applicant: Oracle International Corporation
    Inventors: Isaac William, Harshavardhan Takle, Kavin Kumar Kuppusamy, Venkata Srikanth Bavireddy, Sundar Narayanan
  • Publication number: 20250094210
    Abstract: A system accesses transaction data associated with a plurality of transactions, and based on characteristics of the transaction data, determines a set of functions to be applied to the transaction data at different corresponding levels of granularity. Determining the set of functions includes determining parallel processing requirements corresponding to the set of functions and determining an execution order corresponding to the set of functions based on the parallel processing requirements. The system schedules parallel execution of (a) a first function on the transaction data at a first level of granularity to generate a first dataset having the first level of granularity, and (b) a second function on the transaction data at a second level of granularity to generate a second dataset having the second level of granularity.
    Type: Application
    Filed: April 10, 2024
    Publication date: March 20, 2025
    Applicant: Oracle International Corporation
    Inventors: Rondy C. Ng, Shyam Sundar Santhanam, Sundar Narayanan
  • Publication number: 20250021832
    Abstract: A method includes obtaining, by a processing device, first data indicative of substrate generation parameters of a first substrate. The processing device further obtains second data indicative of properties of the first substrate. The processing device further obtains third data indicative of substrate generation parameters of a second substrate. The processing device further receives fourth data indicative of properties of the second substrate. The method further includes providing a user interface (UI). The UI includes a first UI element for presenting a visual depiction of the second data and a second UI element for presenting a visual depiction of the fourth data. The method further includes receiving user input of a classification of the first substrate and the second substrate. The method further includes performing analysis relating the first data and the third data to the user classifications. The method further includes performing a corrective action based on the analysis.
    Type: Application
    Filed: July 12, 2023
    Publication date: January 16, 2025
    Inventors: Bharath Ram Sundar, Jagadeesh Govindaraj, Raman Krishnan Nurani, Ramachandran Subramanian, Nusrat Jahan Chhanda, Sundar Narayanan
  • Publication number: 20240427308
    Abstract: A method includes receiving data indicative of a range of processing conditions associated with a plurality of substrate processing operations. The data indicative of the range of processing conditions includes a first range of values of a first property and a second range of values of a second property of the processing conditions. The method further includes receiving data indicative of processing performance associated with the plurality of processed substrates. The data includes a first set of data associated with a first indication of substrate performance and a second set of data associated with a second indication of substrate performance. The method further includes performing analysis relating the processing conditions to the processing performance. The method further includes generating a visualization presenting results of the analysis including representations of the first indication of substrate performance and the second indication of substrate performance.
    Type: Application
    Filed: June 23, 2023
    Publication date: December 26, 2024
    Inventors: Rituraj Nandan, Ramachandran Subramanian, Brett Robert Schroeder, Pardeep Kumar, Zhenxing Han, Martha Inez Sanchez, Bharath Ram Sundar, Madhur Singh Sachan, Sundar Narayanan
  • Publication number: 20240384181
    Abstract: The present disclosure generally relates to methods for reducing fouling in tar upgrading processes and to apparatus for carrying out such processes. In some embodiments, a method is provided that includes providing a first tar stream, combining the first tar stream with a utility fluid to form a first process stream having a viscosity lower than that of the first tar stream, and heating the first process stream in a pre-heater under liquid phase conditions without feeding molecular hydrogen gas into the pre-heater to form a second process stream exiting the pre-heater.
    Type: Application
    Filed: October 3, 2022
    Publication date: November 21, 2024
    Inventors: Sundar Narayanan, Gaurav Agrawal, Teng Xu
  • Patent number: 12075712
    Abstract: Fabrication of resistive switching memory devices is herein provided. By way of example, a method for a two-step etch for fabricating a non-volatile resistive memory device is disclosed. In another example, a method for a three-step etch for fabricating a non-volatile resistive memory device is provided. Still other embodiments disclose a method for fabricating a non-volatile metal nitrogen/metal oxygen resistive switching memory device. Further embodiments disclose a method for fabricating a volatile resistive switching selector device. Processes for forming protective spacers in conjunction with fabricating a disclosed resistive memory device are also provided.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: August 27, 2024
    Assignee: CROSSBAR, INC.
    Inventors: Sundar Narayanan, Wee Chen Gan, Natividad Vasquez, Jr.
  • Patent number: 11997932
    Abstract: Resistive switching memory cells having filament-based switching mechanisms are provided. By way of example, resistive switching memory cells having resistive filaments constrained to a core of the cell are disclosed. In other examples, methods for fabricating resistive switching memory cells to constrain a conductive filament formed in the resistive switching memory cell to a central portion of core of the cell are disclosed.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: May 28, 2024
    Assignee: CROSSBAR, INC.
    Inventors: Sundar Narayanan, Wee Chen Gan, Natividad Vasquez, Jr., Wei Ti Lee
  • Publication number: 20240152675
    Abstract: A method includes receiving feature data defining a plurality of features of a virtual substrate. The method further includes preparing the virtual substrate for display on a graphical user interface (GUI). The method further includes receiving one or more first inputs via the GUI. The one or more first inputs are associated with one or more locations of the virtual substrate. The method further includes defining a three-dimensional measurement probe based on the one or more first inputs. The method further includes outputting a measurement of the measurement probe. The measurement is associated with a characteristic of the virtual substrate measured by the three-dimensional measurement probe.
    Type: Application
    Filed: November 7, 2022
    Publication date: May 9, 2024
    Inventors: Dheeraj Kumar, Samit Barai, Pardeep Kumar, Sundar Narayanan, Anantha Sethuraman
  • Patent number: 11944020
    Abstract: A two-terminal resistive switching device (TTRSD) such as a non-volatile two-terminal memory device or a volatile two-terminal selector device can be formed according to a manufacturing process. The process can include forming an etch stop layer that is made of aluminum and can include forming a buffer layer below the etch stop layer and/or between the etch stop layer and a top electrode of the TTRSD.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: March 26, 2024
    Assignee: CROSSBAR, INC.
    Inventors: Sundar Narayanan, Natividad Vasquez, Zhen Gu, Yunyu Wang
  • Publication number: 20240086597
    Abstract: A method includes receiving profile data of a plurality of features of a substrate. The method further includes generating a typical profile based on the profile data of the plurality of features. The method further includes generating a first array of features. Each of the first array of features is based on the typical profile. The method further includes providing the first array of features to a process model. The method further includes obtaining first output from the process model based on the first array of features. The method further includes causing performance of a corrective action in view of the first output from the process model.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 14, 2024
    Inventors: Sundar Narayanan, Samit Barai, Nusrat Jahan Chhanda, Dheeraj Kumar, Pardeep Kumar, Anantha R. Sethuraman, Raman Krishnan Nurani
  • Patent number: 11793093
    Abstract: A self-aligned memory device includes a conductive bottom plug disposed within an insulating layer and having a coplanar top surface, a self-aligned planar bottom electrode disposed upon the coplanar top surface and having a thickness within a range of 50 Angstroms to 200 Angstroms, a planar switching material layer disposed upon the self-aligned planar bottom electrode, a planar active metal material layer disposed upon the planar switching material layer and a planar top electrode disposed above the planar active metal material layer, wherein the self-aligned planar bottom electrode, the planar switching material layer, the planar active metal material layer, and the planar top electrode form a pillar-like structure above the insulating layer.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: October 17, 2023
    Assignee: CROSSBAR, INC.
    Inventors: Sung-Hyun Jo, Sundar Narayanan, Zhen Gu
  • Publication number: 20220320431
    Abstract: Two-terminal resistive switching devices can have a switching layer in which a filament forms and deforms to varying degrees to represent distinct logical states. This switching layer can be formed having a varying ratio, X, of nitrogen to silicon at various strata of the switching layer. Such can result in a two-terminal memory device with improved stability and other characteristics.
    Type: Application
    Filed: March 31, 2021
    Publication date: October 6, 2022
    Inventors: Sundar Narayanan, Yunyu Wang, Zhen Gu, Wee Chen Gan, Wei Ti Lee, Xiesen Yang
  • Publication number: 20220320432
    Abstract: Resistive switching memory cells having filament-based switching mechanisms are provided. By way of example, resistive switching memory cells having resistive filaments constrained to a core of the cell are disclosed. In other examples, methods for fabricating resistive switching memory cells to constrain a conductive filament formed in the resistive switching memory cell to a central portion of core of the cell are disclosed.
    Type: Application
    Filed: March 31, 2021
    Publication date: October 6, 2022
    Inventors: Sundar Narayanan, Wee Chen Gan, Natividad Vasquez, JR., Wei Ti Lee
  • Publication number: 20220320429
    Abstract: Fabrication of resistive switching memory devices is herein provided. By way of example, a method for a two-step etch for fabricating a non-volatile resistive memory device is disclosed. In another example, a method for a three-step etch for fabricating a non-volatile resistive memory device is provided. Still other embodiments disclose a method for fabricating a non-volatile metal nitrogen/metal oxygen resistive switching memory device. Further embodiments disclose a method for fabricating a volatile resistive switching selector device. Processes for forming protective spacers in conjunction with fabricating a disclosed resistive memory device are also provided.
    Type: Application
    Filed: March 31, 2021
    Publication date: October 6, 2022
    Inventors: Sundar Narayanan, Wee Chen Gan, Natividad Vasquez, Jr.
  • Publication number: 20210151671
    Abstract: A two-terminal resistive switching device (TTRSD) such as a non-volatile two-terminal memory device or a volatile two-terminal selector device can be formed according to a manufacturing process. The process can include forming an etch stop layer that is made of aluminum and can include forming a buffer layer below the etch stop layer and/or between the etch stop layer and a top electrode of the TTRSD.
    Type: Application
    Filed: December 18, 2020
    Publication date: May 20, 2021
    Inventors: Sundar Narayanan, Natividad Vasquez, Zhen Gu, Yunyu Wang
  • Patent number: 10873023
    Abstract: A two-terminal resistive switching device (TTRSD) such as a non-volatile two-terminal memory device or a volatile two-terminal selector device can be formed according to a manufacturing process. The process can include forming an etch stop layer that is made of aluminum and can include forming a buffer layer below the etch stop layer and/or between the etch stop layer and a top electrode of the TTRSD.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: December 22, 2020
    Assignee: Crossbar, Inc.
    Inventors: Sundar Narayanan, Natividad Vasquez, Zhen Gu, Yunyu Wang
  • Patent number: 10749110
    Abstract: Two-terminal memory devices can be formed in dielectric material that is electrically insulating and operates as a blocking layer to mitigate diffusion of material from a metal layer. A stack of layers of the two-terminal memory device can be covered with a liner layer that can comprise the dielectric material. Thus, in some implementations, the liner layer and the blocking layer can have a similar etch rate.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: August 18, 2020
    Assignee: Crossbar, Inc.
    Inventors: Sundar Narayanan, Zhen Gu, Natividad Vasquez
  • Publication number: 20200259081
    Abstract: A self-aligned memory device includes a conductive bottom plug disposed within an insulating layer and having a coplanar top surface, a self-aligned planar bottom electrode disposed upon the coplanar top surface and having a thickness within a range of 50 Angstroms to 200 Angstroms, a planar switching material layer disposed upon the self-aligned planar bottom electrode, a planar active metal material layer disposed upon the planar switching material layer and a planar top electrode disposed above the planar active metal material layer, wherein the self-aligned planar bottom electrode, the planar switching material layer, the planar active metal material layer, and the planar top electrode form a pillar-like structure above the insulating layer.
    Type: Application
    Filed: October 1, 2018
    Publication date: August 13, 2020
    Inventors: Sung-Hyun JO, Sundar Narayanan, Zhen GU