Patents by Inventor Sung-Beum Park

Sung-Beum Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9787111
    Abstract: Disclosed is a battery protection module package (PMP). The battery PMP according to an embodiment of the present invention includes a lead frame provided with a plurality of external terminals thereon, a printed circuit board stacked on the lead frame, and a plurality of internal terminals, a protection integrated chip (IC), a field effect transistor (FET), resistors, and capacitors disposed on the printed circuit board and electrically connected to each other, wherein the resistors and the capacitors are mounted on a pattern of the printed circuit board using surface mount technology (SMT), and wherein the plurality of internal terminals are electrically connected to the plurality of external terminals.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: October 10, 2017
    Assignee: ITM SEMICONDUCTOR CO., LTD
    Inventors: Hyeok Hwi Na, Ho Suk Hwang, Young Seok Kim, Sung Beum Park, Sang Hoon Ahn, Tae Hwan Jung, Seung Uk Park, Jae Ku Park, Hyun Mok Cho, Min Ho Park, Young Geun Yoon, Seong Ho Ju, Young Nam Ji, Myoung Ki Moon, Hyun Suck Lee, Ji Young Park
  • Patent number: 9450428
    Abstract: Disclosed is a package module of a battery protection circuit. The package module comprises: a first internal connection terminal area and a second internal connection terminal area, and in which first and second internal connection terminals connected to a battery can provided with a bare cell are respectively disposed; an external connection terminal area, in which a plurality of external connection terminals are disposed; and a protection circuit area comprising a device area in which a plurality of passive devices forming the battery protection circuit are disposed and a chip area, which is adjacent to the device area, and in which a protection IC and a dual FET chip forming the battery protection circuit are disposed, are disposed between the external connection terminal area and the second internal connection terminal area.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: September 20, 2016
    Assignee: ITM SEMICONDUCTOR CO., LTD.
    Inventors: Hyeok-Hwi Na, Young-Seok Kim, Sang-Hoon Ahn, Sung-Beum Park, Seung-Wook Park, Hyun-Mok Cho, Sun-Bok Park, Jae-Goo Park, Ho-Suk Hwang
  • Publication number: 20150333548
    Abstract: Disclosed is a battery protection module package (PMP). The battery PMP according to an embodiment of the present invention includes a lead frame provided with a plurality of external terminals thereon, a printed circuit board stacked on the lead frame, and a plurality of internal terminals, a protection integrated chip (IC), a field effect transistor (FET), resistors, and capacitors disposed on the printed circuit board and electrically connected to each other, wherein the resistors and the capacitors are mounted on a pattern of the printed circuit board using surface mount technology (SMT), and wherein the plurality of internal terminals are electrically connected to the plurality of external terminals.
    Type: Application
    Filed: December 13, 2013
    Publication date: November 19, 2015
    Inventors: Hyeok Hwi NA, Ho Suk HWANG, Young Seok KIM, Sung Beum PARK, Sang Hoon AHN, Tae Hwan JUNG, Seung Uk PARK, Jae Ku PARK, Hyun Mok CHO, Min Ho PARK, Young Geun YOON, Seong Ho JU, Young Nam JI, Myoung Ki MOON, Hyun Suck LEE, Ji Young PARK
  • Publication number: 20140347776
    Abstract: The present invention pertains to a package module of a battery protection circuit, and the package module of the battery protection circuit according to the present invention comprises: a first internal connection terminal area and a second internal connection terminal area, which are respectively disposed at both edge parts thereof, and in which first and second internal connection terminals connected to a battery can provided with a bare cell are respectively disposed; an external connection terminal area, which is adjacent to the first internal connection terminal area, and in which a plurality of external connection terminals are disposed; and a protection circuit area comprising a device area in which a plurality of passive devices forming the battery protection circuit are disposed and a chip area, which is adjacent to the device area, and in which a protection IC and a dual FET chip forming the battery protection circuit are disposed, are disposed between the external connection terminal area and the
    Type: Application
    Filed: August 20, 2012
    Publication date: November 27, 2014
    Applicant: ITM SEMICONDUCTOR CO., LTD
    Inventors: Hyeok-Hwi Na, Young-Seok Kim, Sang-Hoon Ahn, Sung-Beum Park, Seung-Wook Park, Hyun-Mok Cho, Sun-Bok Park, Jae-Goo Park, Ho-Suk Hwang