Abstract: A display apparatus is disclosed. The display apparatus includes a display panel, a master timing controller embedded driver (TED), N slave TEDs and an inter-chip bus. N is a positive integer. The display panel has (N+1) display areas. The master TED is disposed corresponding to a first display area. The N slave TEDs are disposed corresponding to a second display area˜a (N+1)-th display area respectively and controlled by the master TED. The inter-chip bus includes a first wire and a second wire coupled between the master TED and N slave TEDs respectively and used for bi-directionally transmitting clock signal and data signal respectively.

Abstract: A power saving control apparatus applied to a display driving circuit is disclosed. The power saving control apparatus includes a data analysis unit, a bias control unit and a charge sharing unit. The bias control unit is used to perform bias control. The charge sharing unit is used for charge sharing. The data analysis unit is coupled to the bias control unit and the charge sharing unit respectively. The data analysis unit instantly analyzes the display data to generate an instant analysis result and dynamically adjust the setting of bias and slew rate of the bias control unit according to the instant analysis result. The data analysis unit can dynamically adjust the setting of charge sharing range and charge sharing group number needed to be performed by the charge sharing unit according to the instant analysis result.

Abstract: A display apparatus is disclosed. The display apparatus includes a display panel, a master timing controller embedded driver (TED), N slave TEDs and an inter-chip bus. N is a positive integer. The display panel has (N+1) display areas. The master TED is disposed corresponding to a first display area. The N slave TEDs are disposed corresponding to a second display area˜a (N+1)-th display area respectively and controlled by the master TED. The inter-chip bus includes a first wire and a second wire coupled between the master TED and N slave TEDs respectively and used for bi-directionally transmitting clock signal and data signal respectively.

Abstract: A power saving control apparatus applied to a display driving circuit is disclosed. The power saving control apparatus includes a data analysis unit, a bias control unit and a charge sharing unit. The bias control unit is used to perform bias control. The charge sharing unit is used for charge sharing. The data analysis unit is coupled to the bias control unit and the charge sharing unit respectively. The data analysis unit instantly analyzes the display data to generate an instant analysis result and dynamically adjust the setting of bias and slew rate of the bias control unit according to the instant analysis result. The data analysis unit can dynamically adjust the setting of charge sharing range and charge sharing group number needed to be performed by the charge sharing unit according to the instant analysis result.

Abstract: An error detection circuit, applied to a digital communication system with embedded clock, includes a time delay unit, a clock embedding encoding unit, a comparing unit and a packet error counting unit. The time delay unit delays a first digital encoded signal for a period of time. The clock embedding encoding unit generates a second digital encoded signal according to a first digital decoded signal, wherein the first digital decoded signal is generated by decoding the first digital encoded signal. The comparing unit is coupled to the time delay unit and the clock embedding encoding unit respectively and compares the first digital encoded signal with the second digital encoded signal to generate a compared result. The packet error counting unit is coupled to the comparing unit and counts a packet error rate according to the compared result and then provides a flag according to the packet error rate.

Abstract: A method for encoding images according to object shapes is provided. The method enables reduced usage of storage space when an image encoding system encodes a received image frame. The method uses a bottom-up and sequential approach for encoding coefficients. The coefficients in each subband are numbered using a tree structure, wherein level N subband is designated as a root of the whole tree, level (N-1) subbands are designated as roots of subtrees, and level (N=1) subbands are designated as terminal nodes of subtrees. The terminal nodes for one of the subtrees are numbered first, and then this subtree is numbered in the bottom-up sequence. After that, the terminal nodes for another subtree are numbered, and this numbering sequence continues to number all the other subtrees until the root of the tree has been numbered, so as to allow a bottom-up encoding process for the coefficient to be performed.

Abstract: A method for encoding images according to object shapes is provided. The method enables reduced usage of storage space when an image encoding system encodes a received image frame. The method uses a bottom-up and sequential approach for encoding coefficients. The coefficients in each subband are numbered using a tree structure, wherein level N subband is designated as a root of the whole tree, level (N?1) subbands are designated as roots of subtrees, and level (N=1) subbands are designated as terminal nodes of subtrees. The terminal nodes for one of the subtrees are numbered first, and then this subtree is numbered in the bottom-up sequence. After that, the terminal nodes for another substree are numbered, and this numbering sequence continues to number all the other subtrees until the root of the tree has been numbered, so as to allow a bottom-up encoding process for the coefficient to be performed.