Abstract: A method of manufacturing a gate structure for a nonvolatile memory device is disclosed. A tunneling oxide layer is formed on a substrate, and then a first polysilicon layer, a gate dielectric layer, a second polysilicon layer and a hard mask pattern are sequentially formed on the tunneling oxide layer. Then, the second polysilicon layer, the gate dielectric layer, and the first polysilicon layer are patterned through an etching process using the hard mask pattern to form stacked memory gates on the tunnel oxide layer, each including a floating gate, a gate dielectric layer pattern and a control gate on the tunneling oxide layer, and a select gate provided between the memory gates on the tunneling oxide layer.

Abstract: A method of manufacturing a gate structure for a nonvolatile memory device is disclosed. A tunneling oxide layer is formed on a substrate, and then a first polysilicon layer, a gate dielectric layer, a second polysilicon layer and a hard mask pattern are sequentially formed on the tunneling oxide layer. Then, the second polysilicon layer, the gate dielectric layer, and the first polysilicon layer are patterned through an etching process using the hard mask pattern to form stacked memory gates on the tunnel oxide layer, each including a floating gate, a gate dielectric layer pattern and a control gate on the tunneling oxide layer, and a select gate provided between the memory gates on the tunneling oxide layer.

Abstract: A bipolar junction transistor includes a first well region having a first conductive type, a second well region disposed adjacent to the first well region and having a second conductive type, a base disposed on the first well region and having the first conductive type, an emitter disposed on the first well region and having the second conductive type, and a collector disposed on the second well region and having the second conductive type. The first well region comprises a first impurity region and a second impurity region having an impurity concentration lower than that of the first impurity region. The base is disposed on the first impurity region, and the emitter is disposed on the second impurity region.