Abstract: The present invention relates to a semiconductor package, comprising a carrier, a semiconductor device, a first wire and a second wire. The carrier has a first electrically connecting portion and a second electrically connecting portion. The semiconductor device has a plurality of pads. The first wire electrically connects one of the pads of the semiconductor device and the first electrically connecting portion of the carrier, and the first wire has a first length. The second wire electrically connects one of the pads of the semiconductor device and the second electrically connecting portion of the carrier, and the second wire has a second length. The second length is larger than the first length, and the diameter of the second wire is larger than that of the first wire. Thus, the material usage for the wire is reduced, and the manufacturing cost is reduced.

Abstract: The present invention relates to a semiconductor package, comprising a carrier, a semiconductor device, a first wire and a second wire. The carrier has a first electrically connecting portion and a second electrically connecting portion. The semiconductor device has a plurality of pads. The first wire electrically connects one of the pads of the semiconductor device and the first electrically connecting portion of the carrier, and the first wire has a first length. The second wire electrically connects one of the pads of the semiconductor device and the second electrically connecting portion of the carrier, and the second wire has a second length. The second length is larger than the first length, and the diameter of the second wire is larger than that of the first wire. Thus, the material usage for the wire is reduced, and the manufacturing cost is reduced.

Abstract: A stacked semiconductor package, includes a carrier, a first semiconductor device, a second semiconductor device, a plurality of first wires and a plurality of second wires. The carrier has a plurality of electrically connecting portions. The first semiconductor device has a plurality of first pads. The second semiconductor device has a plurality of second pads. The second semiconductor device is disposed on the first semiconductor device. The first wires electrically connect the first pads of the first semiconductor device and the electrically connecting portions of the carrier, and the second wires electrically connect the second pads of the second semiconductor device and the electrically connecting portions of the carrier. The diameters of the second wires are larger than those of the first wires. Thus, the material of the wires is reduced, and the manufacturing cost is reduced.

Abstract: The present invention relates to a semiconductor package, comprising a carrier, a semiconductor device, a first wire and a second wire. The carrier has a first electrically connecting portion and a second electrically connecting portion. The semiconductor device has a plurality of pads. The first wire electrically connects one of the pads of the semiconductor device and the first electrically connecting portion of the carrier, and the first wire has a first length. The second wire electrically connects one of the pads of the semiconductor device and the second electrically connecting portion of the carrier, and the second wire has a second length. The second length is larger than the first length, and the diameter of the second wire is larger than that of the first wire. Thus, the material usage for the wire is reduced, and the manufacturing cost is reduced.

Abstract: The present invention relates to a stacked semiconductor package, comprising a carrier, a first semiconductor device, a second semiconductor device, a plurality of first wires and a plurality of second wires. The carrier has a plurality of electrically connecting portions. The first semiconductor device has a plurality of first pads. The second semiconductor device has a plurality of second pads. The second semiconductor device is disposed on the first semiconductor device. The first wires electrically connect the first pads of the first semiconductor device and the electrically connecting portions of the carrier, and the second wires electrically connect the second pads of the second semiconductor device and the electrically connecting portions of the carrier. The diameters of the second wires are larger than those of the first wires. Thus, the material of the wires is reduced, and the manufacturing cost is reduced.

Abstract: A semiconductor wafer includes a plurality of areas and an array of dice disposed within each of the areas. The feature of the present invention is that at least two fiducial marks are disposed in each of the areas. The present invention further provides a method of testing a sawed semiconductor wafer.

Abstract: A semiconductor wafer device is provided in this invention. The semiconductor wafer device includes a plurality of chips, circuits, cutting streets, and a polymer layer. The cutting streets include a plurality of longitudinal cutting streets and transverse cutting streets, which are formed between the neighboring chips, and the polymer layer is formed on the cutting streets. In addition, this invention also provides a semiconductor wafer device with a plurality of bumps formed thereon and the bumps are encompassed with a polymer layer.

Abstract: A semiconductor wafer includes a plurality of areas and an array of dice disposed within each of the areas. The feature of the present invention is that at least two fiducial marks are disposed in each of the areas. The present invention further provides a method of testing a sawed semiconductor wafer.

Abstract: A testing module for testing the strength of the welding area on a PCB is disclosed. The testing module has a plurality of first plates each provided with a plurality of pressing plates adjustably mounted thereon and a plurality of second plates each provided with a plurality of supporting plates securely mounted thereon. Each of the pressing plates are located at the center of two adjacent supporting plates, such that a plurality of PCBs are able to be tested for the strength of the welding area at a time.