Patents by Inventor Sung Chul Joo
Sung Chul Joo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11784155Abstract: A system configured to increase a reliability of electrical connections in a device. The system including a lead configured to electrically connect a pad of at least one support structure to a pad of at least one electrical component. The lead includes an upper portion that includes a lower surface arranged on a lower surface thereof. The lower surface of the upper portion is arranged vertically above a first upper surface of a first pad connection portion; and the lower surface of the upper portion is arranged vertically above a second upper surface of the second pad connection portion. A process configured to increase a reliability of electrical connections in a device is also disclosed.Type: GrantFiled: March 24, 2022Date of Patent: October 10, 2023Assignee: WOLFSPEED, INC.Inventors: Sung Chul Joo, Jack Powell, Donald Farrell, Bradley Millon
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Publication number: 20230019230Abstract: A semiconductor device package includes a substrate, a silicon (Si) or silicon carbide (SiC) semiconductor die, and a metal layer on a surface of the semiconductor die. The metal layer includes a bonding surface that is attached to a surface of the substrate by a die attach material. The bonding surface includes opposing edges that extend along a perimeter of the semiconductor die, and one or more non-orthogonal corners that are configured to reduce stress at an interface between the bonding surface and the die attach material. Related devices and fabrication methods are also discussed.Type: ApplicationFiled: September 26, 2022Publication date: January 19, 2023Inventors: Sung Chul Joo, Alexander Komposch, Brian William Condie, Benjamin Law, Jae Hyung Jeremiah Park
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Publication number: 20230010770Abstract: A semiconductor device comprises a lead, a board, and an electrically conductive layer on the board. The lead comprises a longitudinal axis and is soldered to the electrically conductive layer. The semiconductor device further comprises a first solder dam edge and a second solder dam edge, each positioned on the lead not more than 10 mils apart from each other along the longitudinal axis.Type: ApplicationFiled: July 9, 2021Publication date: January 12, 2023Inventors: Sung Chul Joo, Ulf Hakan Andre
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Patent number: 11488923Abstract: A semiconductor device package includes a substrate, a silicon (Si) or silicon carbide (SiC) semiconductor die, and a metal layer on a surface of the semiconductor die. The metal layer includes a bonding surface that is attached to a surface of the substrate by a die attach material. The bonding surface includes opposing edges that extend along a perimeter of the semiconductor die, and one or more non-orthogonal corners that are configured to reduce stress at an interface between the bonding surface and the die attach material. Related devices and fabrication methods are also discussed.Type: GrantFiled: May 24, 2019Date of Patent: November 1, 2022Assignee: WOLFSPEED, INC.Inventors: Sung Chul Joo, Alexander Komposch, Brian William Condie, Benjamin Law, Jae Hyung Jeremiah Park
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Publication number: 20220216175Abstract: A system configured to increase a reliability of electrical connections in a device. The system including a lead configured to electrically connect a pad of at least one support structure to a pad of at least one electrical component. The lead includes an upper portion that includes a lower surface arranged on a lower surface thereof. The lower surface of the upper portion is arranged vertically above a first upper surface of a first pad connection portion; and the lower surface of the upper portion is arranged vertically above a second upper surface of the second pad connection portion. A process configured to increase a reliability of electrical connections in a device is also disclosed.Type: ApplicationFiled: March 24, 2022Publication date: July 7, 2022Inventors: Sung Chul JOO, Jack POWELL, Donald FARRELL, Bradley MILLON
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Patent number: 11335833Abstract: Light-emitting diodes (LEDs), LED arrays, and related devices are disclosed. An LED device includes a first LED chip and a second LED chip mounted on a submount with a light-altering material in between. The light-altering material may include at least one of a light-reflective material and/or a light-absorbing material. Individual wavelength conversion elements may be arranged on each of the first and second LED chips. The light-altering material may improve the contrast between the first and second LED chips as well as between the individual wavelength conversion elements. LED devices may include submounts in modular configurations where LED chips may be mounted on adjacent submounts to form an LED array. Each LED chip of the LED array may be laterally separated from at least one other LED chip by a same distance and a light-altering material may be arranged around the LED array.Type: GrantFiled: August 31, 2018Date of Patent: May 17, 2022Assignee: CREELED, INC.Inventors: Sung Chul Joo, Kenneth M. Davis, David Suich, Jae-Hyung Park, Arthur F. Pun
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Patent number: 11289441Abstract: A system configured to increase a reliability of electrical connections in a device. The system including a lead configured to electrically connect a pad of at least one support structure to a pad of at least one electrical component. The lead includes an upper portion that includes a lower surface arranged on a lower surface thereof. The lower surface of the upper portion is arranged vertically above a first upper surface of a first pad connection portion; and the lower surface of the upper portion is arranged vertically above a second upper surface of the second pad connection portion. A process configured to increase a reliability of electrical connections in a device is also disclosed.Type: GrantFiled: October 9, 2019Date of Patent: March 29, 2022Assignee: WOLFSPEED, INC.Inventors: Sung Chul Joo, Jack Powell, Donald Farrell, Bradley Millon
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Patent number: 11004890Abstract: Substrate based light emitter devices, components, and related methods are disclosed. In some aspects, light emitter components can include a substrate and a plurality of light emitter devices provided over the substrate. Each device can include a surface mount device (SMD) adapted to mount over an external substrate or heat sink. In some aspects, each device of the plurality of devices can include at least one LED chip electrically connected to one or more traces and at least one pair of bottom contacts adapted to mount over a surface of external substrate. The component can further include a continuous layer of encapsulant disposed over each device of the plurality of devices. Multiple devices can be singulated from the component.Type: GrantFiled: August 14, 2017Date of Patent: May 11, 2021Assignee: CreeLED, Inc.Inventors: Sung Chul Joo, Peter Scott Andrews, Erin R. F. Welch
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Publication number: 20210111144Abstract: A system configured to increase a reliability of electrical connections in a device. The system including a lead configured to electrically connect a pad of at least one support structure to a pad of at least one electrical component. The lead includes an upper portion that includes a lower surface arranged on a lower surface thereof. The lower surface of the upper portion is arranged vertically above a first upper surface of a first pad connection portion; and the lower surface of the upper portion is arranged vertically above a second upper surface of the second pad connection portion. A process configured to increase a reliability of electrical connections in a device is also disclosed.Type: ApplicationFiled: October 9, 2019Publication date: April 15, 2021Inventors: Sung Chul Joo, Jack Powell, Donald Farrell, Bradley Millon
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Patent number: 10886198Abstract: A device comprises a base, a die, leads, and an electrically-insulating die housing covering the die. The base comprises a die mounting section in which the die is mounted. The leads extend away from the die mounting section and are electrically connected to the die. The base further comprises a base mounting section and a recessed section. The recessed section comprises a recess between the die mounting section and the base mounting section. The base further comprises a first side, a second side opposing the first side, and a thickness measured between the first and second sides. The thickness of the base throughout the recessed section is less than the thickness of the base throughout the base mounting section. The base further comprises an opening extending at least through the base mounting section from the first side to the second side.Type: GrantFiled: June 23, 2020Date of Patent: January 5, 2021Assignee: CREE, INC.Inventors: Sung Chul Joo, Bradley Millon, Erwin Cohen
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Publication number: 20200373270Abstract: A semiconductor device package includes a substrate, a silicon (Si) or silicon carbide (SiC) semiconductor die, and a metal layer on a surface of the semiconductor die. The metal layer includes a bonding surface that is attached to a surface of the substrate by a die attach material. The bonding surface includes opposing edges that extend along a perimeter of the semiconductor die, and one or more non-orthogonal corners that are configured to reduce stress at an interface between the bonding surface and the die attach material. Related devices and fabrication methods are also discussed.Type: ApplicationFiled: May 24, 2019Publication date: November 26, 2020Inventors: Sung Chul Joo, Alexander Komposch, Brian William Condie, Benjamin Law, Jae Hyung Jeremiah Park
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Publication number: 20200321268Abstract: A device comprises a base, a die, leads, and an electrically-insulating die housing covering the die. The base comprises a die mounting section in which the die is mounted. The leads extend away from the die mounting section and are electrically connected to the die. The base further comprises a base mounting section and a recessed section. The recessed section comprises a recess between the die mounting section and the base mounting section. The base further comprises a first side, a second side opposing the first side, and a thickness measured between the first and second sides. The thickness of the base throughout the recessed section is less than the thickness of the base throughout the base mounting section. The base further comprises an opening extending at least through the base mounting section from the first side to the second side.Type: ApplicationFiled: June 23, 2020Publication date: October 8, 2020Inventors: Sung Chul Joo, Bradley Millon, Erwin Cohen
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Patent number: 10797204Abstract: Submount based light emitter components and related methods are disclosed. In some aspects, light emitter components include a reflective ceramic submount, at least one light emitter chip disposed over a first surface of the submount, a layer of optical conversion material disposed over portions of each of the at least one light emitter chip and the first surface of the submount, and a lens disposed over the layer of optical conversion material. The layer of optical conversion material and the lens define separate and discrete layers over the at least one light emitter chip and submount.Type: GrantFiled: May 30, 2014Date of Patent: October 6, 2020Assignee: Cree, Inc.Inventors: Jesse Colin Reiherzer, Erin R. F. Welch, Sung Chul Joo
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Patent number: 10720379Abstract: The base of an integrated circuit package comprises a first side, and a second side opposing the first side. The base further comprises, a base mounting section, a die mounting section, and a recessed section. The recessed section comprises a recess between the die mounting section and the base mounting section. The base further comprises an opening extending through the base from the first side to the second side. At least a portion of the recess intersects with the opening.Type: GrantFiled: December 19, 2018Date of Patent: July 21, 2020Assignee: CREE, INC.Inventors: Sung Chul Joo, Bradley Millon, Erwin Cohen
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Publication number: 20200203260Abstract: The base of an integrated circuit package comprises a first side, and a second side opposing the first side. The base further comprises, a base mounting section, a die mounting section, and a recessed section. The recessed section comprises a recess between the die mounting section and the base mounting section. The base further comprises an opening extending through the base from the first side to the second side. At least a portion of the recess intersects with the opening.Type: ApplicationFiled: December 19, 2018Publication date: June 25, 2020Inventors: Sung Chul Joo, Bradley Millon, Erwin Cohen
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Publication number: 20200075813Abstract: Light-emitting diodes (LEDs), LED arrays, and related devices are disclosed. An LED device includes a first LED chip and a second LED chip mounted on a submount with a light-altering material in between. The light-altering material may include at least one of a light-reflective material and/or a light-absorbing material. Individual wavelength conversion elements may be arranged on each of the first and second LED chips. The light-altering material may improve the contrast between the first and second LED chips as well as between the individual wavelength conversion elements. LED devices may include submounts in modular configurations where LED chips may be mounted on adjacent submounts to form an LED array. Each LED chip of the LED array may be laterally separated from at least one other LED chip by a same distance and a light-altering material may be arranged around the LED array.Type: ApplicationFiled: August 31, 2018Publication date: March 5, 2020Inventors: Sung Chul Joo, Kenneth M. Davis, David Suich, Jae-Hyung Park, Arthur F. Pun
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Patent number: 9897267Abstract: Light emitter components, systems, and related methods having improved optical efficiency and a lower manufacturing cost are disclosed. In one aspect, a light emitter component can include a substrate having an elongated body and first and second ends. At least a first trace and a second trace can be provided on the substrate. In some aspects, the first trace can be disposed proximate the first end of the substrate and the second trace can be disposed proximate the second end of the substrate, with no other portion of the first trace or second trace being disposed between the first and second ends of the substrate. In some aspects, a string of LED chips can be provided on the substrate. The string of LED chips can be disposed between the first and second ends of the substrate. Angled traces, gaps and light emitter components can also be provided in some aspects.Type: GrantFiled: March 15, 2013Date of Patent: February 20, 2018Assignee: Cree, Inc.Inventors: Christopher P. Hussell, Sung Chul Joo, Erin Welch, Peter Scott Andrews, Joseph G. Clark, John A. Edmond, Jesse C. Reiherzer
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Patent number: 9859471Abstract: High-brightness light emitting diode (LED) packages, systems and methods with improved resin filling and high adhesion are provided. In one aspect, a high brightness package for a light emitter (e.g., a LED or LED chip) can include a body and a cavity disposed in the body. The cavity can include at least one cavity wall extending toward an intersection area of the body where the cavity wall intersects a cavity floor. The package can further include at least one electrical element having first and second surfaces, each of the first and second surfaces proximate the intersection area. The first surface can be disposed on a first plane and the second surface can be at least partially disposed on a second plane that is different than the first plane. The body can at least substantially cover the second surface.Type: GrantFiled: January 31, 2012Date of Patent: January 2, 2018Assignee: Cree, Inc.Inventors: Christopher P. Hussell, Sung Chul Joo
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Publication number: 20170345866Abstract: Substrate based light emitter devices, components, and related methods are disclosed. In some aspects, light emitter components can include a substrate and a plurality of light emitter devices provided over the substrate. Each device can include a surface mount device (SMD) adapted to mount over an external substrate or heat sink. In some aspects, each device of the plurality of devices can include at least one LED chip electrically connected to one or more traces and at least one pair of bottom contacts adapted to mount over a surface of external substrate. The component can further include a continuous layer of encapsulant disposed over each device of the plurality of devices. Multiple devices can be singulated from the component.Type: ApplicationFiled: August 14, 2017Publication date: November 30, 2017Inventors: Sung Chul Joo, Peter Scott Andrews, Erin R. F. Welch
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Patent number: 9735198Abstract: Substrate based light emitter devices, components, and related methods are disclosed. In some aspects, light emitter components can include a substrate and a plurality of light emitter devices provided over the substrate. Each device can include a surface mount device (SMD) adapted to mount over an external substrate or heat sink. In some aspects, each device of the plurality of devices can include at least one LED chip electrically connected to one or more traces and at least one pair of bottom contacts adapted to mount over a surface of external substrate. The component can further include a continuous layer of encapsulant disposed over each device of the plurality of devices. Multiple devices can be singulated from the component.Type: GrantFiled: March 15, 2013Date of Patent: August 15, 2017Assignee: Cree, Inc.Inventors: Sung Chul Joo, Peter Scott Andrews, Erin Welch