Abstract: A battery diagnosis apparatus for diagnosing a battery including battery cells, the apparatus according to an embodiment may include a voltage measurer for measuring the voltage of each battery cell during a preset period of time, a voltage variation calculator for calculating an individual voltage variation of each battery cell during the preset period of time, an average voltage variation calculator for calculating an average voltage variation of the battery cells during the preset period of time, and an abnormality detector for determining that a voltage abnormality has occurred in at least one battery cell among the battery cells when a difference between the voltage variation of the at least one battery cell and the average voltage variation of the at least one battery cell is greater than a threshold value.

Abstract: Disclosed are novel compounds of Chemical Formula 1, optical isomers of the compounds, and pharmaceutically acceptable salts of the compounds or the optical isomers. The compounds, isomers, and salts exhibit excellent activity as GLP-1 receptor agonists. In particular, they, as GLP-1 receptor agonists, exhibit excellent glucose tolerance, thus having a great potential to be used as therapeutic agents for metabolic diseases. Moreover, they exhibit excellent pharmacological safety for cardiovascular systems.

Abstract: A scrubber system may include a scrubber housing including a vertically extended cleaning space, an inflow chamber coupled to a bottom portion of the scrubber housing, and first and second inflow portions, each of which is configured to supply a gas into the inflow chamber. The inflow chamber may include a mixing space, and the mixing space may be connected to the cleaning space. The first inflow portion may include a first connection pipe coupled to the inflow chamber to provide a first connection path and the second inflow portion may include a second connection pipe coupled to the inflow chamber to provide a second connection path. The first and second connection paths may be extended toward the mixing space in opposite directions, respectively, and may be connected to opposite portions of the mixing space, respectively.

Abstract: An application processor includes a reconfigurable hardware scaler which includes dedicated circuits configured to perform different scaling techniques, respectively and a shared circuit configured to be shared by the dedicated circuits. One of the different scaling techniques is performed by one of the dedicated circuits and the shared circuit.

Abstract: An electrode manufacturing device for manufacturing an electrode includes: a first support unit having a plate shape extending along a plane and injecting a first pressurized fluid in a 1st-1st direction perpendicular to the plane; a second support unit having a plate shape extending along one plane, disposed to face the first support unit at a certain distance, and injecting a second pressurized fluid in a 1st-2nd direction opposite to the 1st-1st direction; a transfer unit configured to transfer an electrode having a sheet-shape in a direction of gravity and dispose a first area of the electrode between the first support unit and the second support unit; and a laser beam notching unit configured to notch and cut a portion of a second area of the electrode by irradiating a laser beam to the electrode in the 1st-1st direction.

Abstract: A scrubber system may include a scrubber housing including a vertically extended cleaning space, an inflow chamber coupled to a bottom portion of the scrubber housing, and first and second inflow portions, each of which is configured to supply a gas into the inflow chamber. The inflow chamber may include a mixing space, and the mixing space may be connected to the cleaning space. The first inflow portion may include a first connection pipe coupled to the inflow chamber to provide a first connection path and the second inflow portion may include a second connection pipe coupled to the inflow chamber to provide a second connection path. The first and second connection paths may be extended toward the mixing space in opposite directions, respectively, and may be connected to opposite portions of the mixing space, respectively.

Abstract: An application processor includes a reconfigurable hardware scaler which includes dedicated circuits configured to perform different scaling techniques, respectively and a shared circuit configured to be shared by the dedicated circuits. One of the different scaling techniques is performed by one of the dedicated circuits and the shared circuit.

Abstract: A semiconductor device includes a processor configured to perform a rendering operation of an image frame to acquire rendering data, and write the acquired rendering data on a memory device, and a display controller configured to perform a read operation of the memory device on which the rendering data is written, to acquire image data. The semiconductor device further includes a micro-sequencing circuit configured to transmit a start signal to the display controller, based on a degree of execution of the rendering operation. The display controller is further configured to, based on the transmitted start signal, start the read operation.

Abstract: An application processor includes a reconfigurable hardware scaler which includes dedicated circuits configured to perform different scaling techniques, respectively and a shared circuit configured to be shared by the dedicated circuits. One of the different scaling techniques is performed by one of the dedicated circuits and the shared circuit.

Abstract: An application processor includes a reconfigurable hardware scaler which includes dedicated circuits configured to perform different scaling techniques, respectively and a shared circuit configured to be shared by the dedicated circuits. One of the different scaling techniques is performed by one of the dedicated circuits and the shared circuit.

Abstract: A semiconductor device includes a processor configured to perform a rendering operation of an image frame to acquire rendering data, and write the acquired rendering data on a memory device, and a display controller configured to perform a read operation of the memory device on which the rendering data is written, to acquire image data. The semiconductor device further includes a micro-sequencing circuit configured to transmit a start signal to the display controller, based on a degree of execution of the rendering operation. The display controller is further configured to, based on the transmitted start signal, start the read operation.

Abstract: An application processor includes a reconfigurable hardware scaler which includes dedicated circuits configured to perform different scaling techniques, respectively and a shared circuit configured to be shared by the dedicated circuits. One of the different scaling techniques is performed by one of the dedicated circuits and the shared circuit.

Abstract: An image processor comprises first scaling logic that receives image data comprising a first number of lines and generates first scaled image data by scaling down the image data in a first direction, a rotation buffer that has storage capacity for storing a second number of lines less than the first number of lines and stores the first scaled image data in a rotated state, and second scaling logic that generates second scaled image data by scaling down the first scaled image data in a second direction different from the first direction.

Abstract: An adhesive film and an organic electronic device including the same are provided. The adhesive film includes: a first bonding layer including a first bonding component layer, a moisture absorbent, and first core shell particles; and a second bonding layer disposed below the first bonding layer and including second core shell particles, which are formed of a different material from the first core shell particles, wherein each of the first core shell particles includes a first shell and a first core surrounded by the first shell and each of the second core shell particles includes a second shell and a second core surrounded by the second shell.

Abstract: An application processor includes a reconfigurable hardware scaler which includes dedicated circuits configured to perform different scaling techniques, respectively and a shared circuit configured to be shared by the dedicated circuits. One of the different scaling techniques is performed by one of the dedicated circuits and the shared circuit.

Abstract: An application processor includes a reconfigurable hardware scaler which includes dedicated circuits configured to perform different scaling techniques, respectively and a shared circuit configured to be shared by the dedicated circuits. One of the different scaling techniques is performed by one of the dedicated circuits and the shared circuit.

Abstract: An adhesive film and an organic electronic device including the same are provided. The adhesive film includes: a first bonding layer including a first bonding component layer, a moisture absorbent, and first core shell particles; and a second bonding layer disposed below the first bonding layer and including second core shell particles, which are formed of a different material from the first core shell particles, wherein each of the first core shell particles includes a first shell and a first core surrounded by the first shell and each of the second core shell particles includes a second shell and a second core surrounded by the second shell.

Abstract: An image processor, an application processor, a method of operating an image processor, and a chips set of an image processor are provided. The image processor includes a scaler configured to perform scaling on an input image and generate a scaled input image; and a selection circuit configured to transmit the scaled input image to either a low latency memory or a high density memory according to a memory selection signal. The application processor includes a memory configured to store an input image; and an image processor configured to scale the input image, wherein the image processor comprises a scaler configured to perform scaling on the input image and generate a scaled input image and a selection circuit configured to transmit the scaled input image to either a low latency memory or a high density memory according to a memory selection signal.

Abstract: A display controller includes a scaler which is configured to receive a frame image, scale up the frame image to generate a high resolution frame image based on a quality of the frame image and information about a display device, and output the frame image or the high resolution frame image to the display device for display. A method of controlling image display includes: receiving a frame image; determining whether to scale up the frame image to generate a high resolution frame image based on a quality of the frame image and information about a display device; scaling up the frame image according to a result of the determining; and outputting the frame image or the high resolution frame image for display at the display device.

Abstract: A display controller includes a first register set by an open operating system, a second register set by a secure operating system, a first data input circuit configured to read normal data according to set information in the first register, a second data input circuit configured to read secure data according to set information in the second register, and a data processor configured to blend and output the normal data with the secure data to display the secure data over the normal data.