Abstract: The present disclosure relates generally to the manufacturing of semiconductor devices, and more particularly to an improved connection structure for semiconductor devices. A connection structure for a semiconductor device includes: a peanut-shaped opening comprising a narrow area and one or more wide areas, wherein the narrow area is between two of the one or more wide areas; and a conductive plug for filling at least partially the peanut-shaped opening.

Abstract: The present disclosure relates generally to the manufacturing of semiconductor devices, and more particularly to an improved connection structure for semiconductor devices. A connection structure for a semiconductor device includes: a peanut-shaped opening comprising a narrow area and one or more wide areas, wherein the narrow area is between two of the one or more wide areas; and a conductive plug for filling at least partially the peanut-shaped opening.

Abstract: A semiconductor memory device comprising a test structure is disclosed. The semiconductor device includes a plurality of memory cells, word lines, bit lines, and test pads; the word lines including a first set and a second set of word lines, connected to a first and second word line test pad, respectively; the bit lines including a first set and a second set of bit lines, connected to a first and second bit line test pad, respectively. The first set of word lines and the first set of bit lines access a first set of memory cells, the first set of word lines and the second set of bit lines access a second set of memory cells, the second set of word lines and the first set of bit lines access a third set of memory cells, and the second set of word lines and the second set of bit lines access a fourth set of memory cells.

Abstract: A method of fabricating bonding pad structure for improving bonding pad surface quality. A substrate has a bonding pad thereon. A passivation is formed on the bonding pad to expose the bonding pad. A sacrificial layer is formed on the passivation and an opening is formed within the sacrificial layer to expose the bonding pad. A Cu/Al alloy is formed on the passivation to at least cover the bonding pad. The sacrificial layer and the Cu/Al alloy thereon are removed, such that the Cu/Al alloy remains on the bonding pad.

Abstract: A method for forming shallow trench isolation (STI) structures on a semiconductor substrate is disclosed. First a semiconductor substrate with a first area and a second area adjacent to the first area is provided. A mask layer is formed on the substrate, and is etched to expose portions of the substrate. A first photoresist is formed to cover the second area for exposing the first area. A first implanting procedure is performed with a titled angle to form first doping areas on the substrate encroaching into portions of the substrate covered by the first photoresist. The first photoresist is removed. A second photoresist is formed on the substrate to cover the first area for exposing the second area. And a second implanting procedure is done with a titled angle to form second doping areas on the substrate encroaching into portions of the substrate covered by the second photoresist. The second photoresist is removed.

Abstract: A method of forming a CVD nitride (e.g., titanium nitride) film on a substrate. The as-deposited nitride film is treated by a plasma of a high power density (preferably between approximately 200 W and 300 W) for a prolonged duration of time (preferably between approximately 32 s and 52 s) to reduce the tendency of the resistance and thickness of the as-deposited film to change because of either time of exposure to atmosphere or subsequent processing steps.

Abstract: A method of reducing tungsten plug loss in processes for fabrication for silicon-based semiconductor devices that include a tungsten plug in a high aspect ratio contact hole. The invention provides a barrier layer prepared by first forming a conformal layer of titanium nitride by chemical vapor deposition. Afterward, another film of titanium nitride is supplied by plasma vapor deposition. The barrier layer comprises at least these two films, and tungsten is then deposited to at least fill the high aspect ratio film-coated contact hole. Upon removal of excess tungsten as by wet etch back, the tungsten plug remains essentially intact, and any plug loss is insignificant in comparison with the prior art.