Patents by Inventor Sung-Duk Hong

Sung-Duk Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230079250
    Abstract: A method for generating a model using a virtual target, and a system configured to generate a model using a virtual target are provided. The method for generating a model using a virtual target includes performing machine learning based on previous generation data stored in a database to generate the virtual target of a current generation, and extracting parameters related to the virtual target, and determining values of the extracted parameters based on the virtual target to generate a model.
    Type: Application
    Filed: July 11, 2022
    Publication date: March 16, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ji Hye SHIN, Min Kyoung KIM, Jeong Min LEE, Sang Hoon MYUNG, Hyo Won MOON, Sung Jin KIM, Sung Duk HONG
  • Publication number: 20230031793
    Abstract: A simulation system is provided. The simulation system comprises a processor, and a storage to store a simulation program that, when executed by the processor, causes the processor to, use a finite difference method (FDM) to calculate heat energy data generated by light energy provided to a simulation domain, receive the calculated heat energy data and use a finite-element method (FEM) to calculate temperature change data of the simulation domain over time and calculate phase change data of the simulation domain over time, and calculate a silicon loss of the simulation domain using the calculated temperature change data and the calculated phase change.
    Type: Application
    Filed: April 19, 2022
    Publication date: February 2, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seung Hyun KIM, Joo Hyun JEON, Jae Seong PARK, Sung Jin KIM, Sung Duk HONG
  • Patent number: 8981480
    Abstract: A semiconductor device includes a buried well, first and second active regions, an isolation layer, and a low resistance region. The buried well is disposed on a substrate and has impurity ions of a first conductivity type. The first and second active regions are disposed on the buried well and each have impurity ions of a second conductivity type, which is different from the first conductivity type. The isolation layer is disposed between the first and second active regions. The low resistance region is disposed between the isolation layer and the substrate and has impurity ions of the second conductivity type. The concentration of impurity ions in the low resistance region is greater than the concentration of the impurity ions in each of the first and second active regions.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: March 17, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Hee Lim, Satoru Yamada, Sung-Duk Hong
  • Publication number: 20120049256
    Abstract: A semiconductor device includes a buried well, first and second active regions, an isolation layer, and a low resistance region. The buried well is disposed on a substrate and has impurity ions of a first conductivity type. The first and second active regions are disposed on the buried well and each have impurity ions of a second conductivity type, which is different from the first conductivity type. The isolation layer is disposed between the first and second active regions. The low resistance region is disposed between the isolation layer and the substrate and has impurity ions of the second conductivity type. The concentration of impurity ions in the low resistance region is greater than the concentration of the impurity ions in each of the first and second active regions.
    Type: Application
    Filed: July 12, 2011
    Publication date: March 1, 2012
    Inventors: Jun-Hee Lim, Satoru Yamada, Sung-Duk Hong