Abstract: A semiconductor device and method of manufacture are provided. In some embodiments isolation regions are formed by modifying a dielectric material of a dielectric layer such that a first portion of the dielectric layer is more readily removed by an etching process than a second portion of the dielectric layer. The modifying of the dielectric material facilitates subsequent processing steps that allow for the tuning of a profile of the isolation regions to a desired geometry based on the different material properties of the modified dielectric material.

Abstract: A level shifter circuit includes: K level shifter units for receiving K input signals having a first voltage level range and outputting K output signals having a second voltage level range, wherein the second voltage level range is greater than the first voltage level range. Each level shifter unit is utilized to output an output signal at an output end and includes: a first switch, coupled between the output end and a first voltage source for controlling the electrical connection between the first voltage source and the output end according to an input signal; and (K?1) second switches, connected in parallel between the output end and a second voltage source, for respectively controlling its ON/OFF status according to (K?1) output signals except for the output signal. K is an integer.

Abstract: A level shifter circuit includes: K level shifter units for receiving K input signals having a first voltage level range and outputting K output signals having a second voltage level range, wherein the second voltage level range is greater than the first voltage level range. Each level shifter unit is utilized to output an output signal at an output end and includes: a first switch, coupled between the output end and a first voltage source for controlling the electrical connection between the first voltage source and the output end according to an input signal; and (K-1) second switches, connected in parallel between the output end and a second voltage source, for respectively controlling its ON/OFF status according to (K-1) output signals except for the output signal. K is an integer.

Abstract: An amplifier circuit includes an operational amplifier and a compensation circuit. The operational amplifier includes an amplifying stage for amplifying an input signal to generate an amplifying signal; and an output stage coupled to an output node of the amplifying stage for receiving the amplifying signal and generating an output signal according to the amplifying signal. The compensation circuit is coupled to the output stage and the amplifying stage for generating a compensation signal according to the output signal, and feeding the compensation signal back to the output node of the amplifying stage for compensating the amplifying signal.