Abstract: A liquid crystal display (LCD) apparatus and method of controlling the same equipped with an image processor and a liquid crystal panel having a matrix array formed with liquid crystal pixels to display video data processed by the image processor on a screen includes liquid crystal pixel drivers connected in series. Driver arrays drive the liquid crystal pixel drivers. A timing controller converts the video data into serial data bit streams and transmits the serial data bit streams to the driver arrays, so that the driver arrays control each liquid crystal pixel driver to receive the serial data bit streams respectively.

Abstract: A flat panel display for receiving digital display information including video data and synchronizing data from a host includes: a receiver for reconstructing the display information, a synchronizing signal generator for generating a synchronizing signal by extracting the synchronizing data from the reconstructed display information, a digital-to-analog converter for converting the video data to a corresponding video signal, and an output terminal for externally transferring the synchronizing signal and analog video signal to an analog display. A video data converter is further included to convert line and dot numbers of the video data so as to correspond to a prescribed display mode when the synchronizing data has a different characteristic from the prescribed display mode. The synchronizing signal generator generates the synchronizing signal corresponding to the display mode.

Abstract: A video signal reproducing apparatus and method for adjusting a change in a horizontal synchronous signal. The video signal reproducing apparatus transforms a format of an input video signal, generates horizontal and vertical synchronous signals, and displays the video. The video signal reproducing apparatus includes a measurer, a comparator, and an adjustor. The measurer measures a period of the horizontal synchronous signal, the comparator compares the measured period of the horizontal synchronous signal with a predetermined reference range, and the adjustor adjusts a period of a clock signal for producing the horizontal synchronous signal, if the measured period of the horizontal synchronous signal fails to fall within the predetermined reference range.

Abstract: A liquid crystal display (LCD) apparatus and method of controlling the same equipped with an image processor and a liquid crystal panel having a matrix array formed with liquid crystal pixels to display video data processed by the image processor on a screen includes liquid crystal pixel drivers connected in series. Driver arrays drive the liquid crystal pixel drivers. A timing controller converts the video data into serial data bit streams and transmits the serial data bit streams to the driver arrays, so that the driver arrays control each liquid crystal pixel driver to receive the serial data bit streams respectively.

Abstract: A display device includes a plurality of input timing control circuits for generating a plurality of first clock signals in synchronization with a corresponding plurality of horizontal synchronization signals received via multiple channels, an output timing control circuit coupled to receive the first clock signals for generating a second clock signal, and a plurality of video memory circuits for storing a plurality of digital video data received via the multiple channels. The writing operations of the video memory circuits are respectively controlled by the plurality of input timing control circuits and the reading operation of each of the video memory circuits is controlled by the output timing control circuit. The display device further includes an output buffer memory circuit coupled to the video memory circuits for storing the plurality of digital video data from the video memory circuits.

Abstract: A counter control circuit of a counter for measuring a pulse period of a video synchronization signal includes a main control unit having a synchronization signal input Sync, and a control signal producing unit including a stop signal generator, a latch signal generator, and a start signal generator. The outputs of the stop, latch and start signal generators are supplied to the counter for controlling the counter to count clock pulses fed from a clock generator in response to receipt of a start signal and output a count value in response to receipt of a latch signal. The main control unit produces sequential control signals during the input of the video synchronization signal differentiated by the clock pulses. The counter control circuit allows the counter to measure a pulse period of an input synchronization signal in a stable state that results in an accurate count value, since the count operation is first stopped and the count value is latched by the clock signal.

Abstract: A video display converting circuit for converting scanning patterns from interlaced scanning to sequential scanning of a display device includes an input terminal for receiving an input interlaced scanning video signal having alternating odd and even fields of scanning lines; a first line memory for storing picture elements of the input interlaced scanning video signal in a first line of an odd field; a second line memory for storing picture elements of the input interlaced scanning video signal in a last line of an even field; a plurality of sequential line memories for storing picture elements of the input interlaced scanning video signal in sequence for each scanning line; a demultiplexer for sequentially inputting the picture elements of the input interlaced scanning video signal into each of the first line memory, the second line memory and each of the plurality of sequential line memories in accordance with a write clock signal; a first multiplexer for producing a first output signal by multiplexing bet

Abstract: A resolution conversion apparatus for a display device which converts input image signals to image signals having different resolution is provided. The resolution conversion apparatus for a display device can increase or decrease the number of scanning lines by using interpolation function to prevent the non-linear distortion due to the nonuniform insertion of scanning lines. The resolution conversion apparatus for a display device can also vary the interpolation function according to the frequency of image information to compensate the decrease of sharpness resulting from the conventional interpolation method using simple proportional values.

Abstract: A digital to analog converter using pulse width modulation is disclosed. The digital to analog converter according to the invention comprises a PWM pulse generator and an integrator. First, the PWM pulse generator includes a first data buffer 100 and a second data buffer 200. First data buffer 100 is provided with an input terminal for receiving digital signals having control value D.sub.in produced by the system controller, for example, in response to a key input. Second data buffer 200 is provided for storing the previous control value D.sub.in-1. The new input data stored in first data buffer 100 and second data buffer 200 are compared one another in a controller 600. The controller 600 is provided for receiving the output signal of comparator 500 and for supplying control signals with a pulse generator 300 and a time constant selector 400 based on the comparator output signal.