Patents by Inventor Sung Gyu Ryo

Sung Gyu Ryo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of forming metal interconnection layer in semiconductor device
    Patent number: 6720248
    Abstract: The present invention relates to a method of forming a metal interconnection layer in a semiconductor device by which a dual damascene pattern, a via hole or a trench having a high aspect ratio is consecutively filled with a metal film without void by means of an electroplating method.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: April 13, 2004
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sung Gyu Ryo
  • Method of forming metal interconnection layer in semiconductor device
    Publication number: 20030186524
    Abstract: The present invention relates to a method of forming a metal interconnection layer in a semiconductor device by which a dual damascene pattern, a via hole or a trench having a high aspect ratio is consecutively filled with a metal film without void by means of an electroplating method.
    Type: Application
    Filed: December 23, 2002
    Publication date: October 2, 2003
    Applicant: Hynix Semiconductor Inc.
    Inventor: Sung Gyu Ryo