Patents by Inventor Sung-ho Eun
Sung-ho Eun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240105102Abstract: A display device includes a pixel component including first pixels which emits light having a first color, and second pixels which emits light having a second color different from the first color, a sensing component which extracts, during a sensing period, first sensing data from the first pixels, and second sensing data from the second pixels, and a temperature determiner which senses a temperature of the pixel component using the first sensing data and the second sensing data. The temperature determiner senses, when the first sensing data is supplied to the temperature determiner, the temperature of the pixel component at least one time.Type: ApplicationFiled: August 3, 2023Publication date: March 28, 2024Inventors: Sung Hoon BANG, Dong Ki EUN, Seung Ho PARK, Seok Gyu BAN, Wook LEE
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Publication number: 20230354617Abstract: A variable resistance memory device includes a substrate, a cell array region including a plurality of memory cells on the substrate, a wiring region which includes an inter-wiring insulating film stacked on the cell array region, and an upper wiring structure in the inter-wiring insulating film and a protective film which covers an upper surface of the cell array region, between the cell array region and the wiring region, wherein each of the memory cells includes a switching pattern and a variable resistance pattern, the cell array region further includes first conductive lines extending in a first direction, and a second conductive lines extending in a second direction intersecting the first direction, and the plurality of memory cells are disposed at an intersections of the first conductive lines and the second conductive lines.Type: ApplicationFiled: February 2, 2023Publication date: November 2, 2023Inventors: Sung-Ho EUN, Yu Na GIL, Su Min YU
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Patent number: 11227991Abstract: A semiconductor memory device includes first conductive lines extending in a first direction on a substrate, second conductive lines extending in a second direction over the first conductive line, the first and the second conductive lines crossing each other at cross points, a cell structure positioned at each of the cross points, each of the cell structures having a data storage element, a selection element to apply a cell selection signal to the data storage element and to change a data state of the data storage element, and an electrode element having at least an electrode with a contact area smaller than that of the selection element, and an insulation pattern insulating the first and the second conductive lines and the cell structures from one another.Type: GrantFiled: June 30, 2020Date of Patent: January 18, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dong-Jun Seong, Sung-Ho Eun, Soon-Oh Park
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Patent number: 10971548Abstract: A variable resistance non-volatile memory device can include a semiconductor substrate and a plurality of first conductive lines each extending in a first direction perpendicular to the semiconductor substrate and spaced apart in a second direction on the semiconductor substrate. A second conductive line can extend in the second direction parallel to the semiconductor substrate on a first side of the plurality of first conductive lines and a third conductive line can extend in the second direction parallel to the semiconductor substrate on a second side of the plurality of first conductive lines opposite the first side of the plurality of first conductive lines.Type: GrantFiled: March 15, 2019Date of Patent: April 6, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung-Ho Eun, Daehwan Kang, Sungwon Kim, Youngbae Kim, Seokjae Won
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Publication number: 20200335692Abstract: A semiconductor memory device includes first conductive lines extending in a first direction on a substrate, second conductive lines extending in a second direction over the first conductive line, the first and the second conductive lines crossing each other at cross points, a cell structure positioned at each of the cross points, each of the cell structures having a data storage element, a selection element to apply a cell selection signal to the data storage element and to change a data state of the data storage element, and an electrode element having at least an electrode with a contact area smaller than that of the selection element, and an insulation pattern insulating the first and the second conductive lines and the cell structures from one another.Type: ApplicationFiled: June 30, 2020Publication date: October 22, 2020Inventors: Dong-Jun SEONG, Sung-Ho EUN, Soon-Oh PARK
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Patent number: 10714686Abstract: Variable resistance memory devices and methods of forming the same are provided. The variable resistance memory devices may include a substrate including a cell region and a peripheral region, first conductive lines on the substrate, second conductive lines traversing the first conductive lines, variable resistance structures at intersecting points of the first conductive lines and the second conductive lines, and bottom electrodes between the first conductive lines and the variable resistance structures. The cell region may include a boundary region contacting the peripheral region, and one of the first conductive lines is electrically insulated from one of the variable resistance structures that is on the boundary region and overlaps the one of the first conductive lines.Type: GrantFiled: January 12, 2018Date of Patent: July 14, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Sungwon Kim, Sung-Ho Eun, Ilmok Park, Junghoon Park, Seulji Song, Ji-Hyun Jeong
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Patent number: 10700127Abstract: A memory device includes first conductive lines extending on a substrate along a first direction; second conductive lines extending on the first conductive lines along a second direction intersecting with the first direction; and memory cell structures, which are at intersections between the first conductive lines and the second conductive lines and connected to the first conductive lines and the second conductive lines, each of the memory cell structures including a first electrode layer, a second electrode layer, and a resistive memory layer between the first electrode layer and the second electrode layer. A first sidewall of each of the resistive memory layers is sloped and has a horizontal width that decreases in a direction away from the substrate, and a second sidewall of each of the resistive memory layer adjacent to the first sidewall is sloped and has a horizontal width that increases in a direction away from the substrate.Type: GrantFiled: June 6, 2019Date of Patent: June 30, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Seul-ji Song, Jung-hoon Park, Sung-ho Eun
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Publication number: 20200027925Abstract: A variable resistance non-volatile memory device can include a semiconductor substrate and a plurality of first conductive lines each extending in a first direction perpendicular to the semiconductor substrate and spaced apart in a second direction on the semiconductor substrate. A second conductive line can extend in the second direction parallel to the semiconductor substrate on a first side of the plurality of first conductive lines and a third conductive line can extend in the second direction parallel to the semiconductor substrate on a second side of the plurality of first conductive lines opposite the first side of the plurality of first conductive lines.Type: ApplicationFiled: March 15, 2019Publication date: January 23, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: SUNG-HO EUN, Daehwan Kang, Sungwon Kim, Youngbae Kim, Seokjae Won
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Publication number: 20190288038Abstract: A memory device includes first conductive lines extending on a substrate along a first direction; second conductive lines extending on the first conductive lines along a second direction intersecting with the first direction; and memory cell structures, which are at intersections between the first conductive lines and the second conductive lines and connected to the first conductive lines and the second conductive lines, each of the memory cell structures including a first electrode layer, a second electrode layer, and a resistive memory layer between the first electrode layer and the second electrode layer. A first sidewall of each of the resistive memory layers is sloped and has a horizontal width that decreases in a direction away from the substrate, and a second sidewall of each of the resistive memory layer adjacent to the first sidewall is sloped and has a horizontal width that increases in a direction away from the substrate.Type: ApplicationFiled: June 6, 2019Publication date: September 19, 2019Inventors: Seul-ji SONG, Jung-hoon PARK, Sung-ho EUN
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Patent number: 10355050Abstract: A memory device includes first conductive lines extending on a substrate along a first direction; second conductive lines extending on the first conductive lines along a second direction intersecting with the first direction; and memory cell structures, which are at intersections between the first conductive lines and the second conductive lines and connected to the first conductive lines and the second conductive lines, each of the memory cell structures including a first electrode layer, a second electrode layer, and a resistive memory layer between the first electrode layer and the second electrode layer. A first sidewall of each of the resistive memory layers is sloped and has a horizontal width that decreases in a direction away from the substrate, and a second sidewall of each of the resistive memory layer adjacent to the first sidewall is sloped and has a horizontal width that increases in a direction away from the substrate.Type: GrantFiled: June 12, 2018Date of Patent: July 16, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Seul-ji Song, Jung-hoon Park, Sung-ho Eun
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Publication number: 20190140021Abstract: A memory device includes first conductive lines extending on a substrate along a first direction; second conductive lines extending on the first conductive lines along a second direction intersecting with the first direction; and memory cell structures, which are at intersections between the first conductive lines and the second conductive lines and connected to the first conductive lines and the second conductive lines, each of the memory cell structures including a first electrode layer, a second electrode layer, and a resistive memory layer between the first electrode layer and the second electrode layer. A first sidewall of each of the resistive memory layers is sloped and has a horizontal width that decreases in a direction away from the substrate, and a second sidewall of each of the resistive memory layer adjacent to the first sidewall is sloped and has a horizontal width that increases in a direction away from the substrate.Type: ApplicationFiled: June 12, 2018Publication date: May 9, 2019Inventors: Seul-ji Song, Jung-hoon Park, Sung-ho Eun
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Publication number: 20190019950Abstract: Variable resistance memory devices and methods of forming the same are provided. The variable resistance memory devices may include a substrate including a cell region and a peripheral region, first conductive lines on the substrate, second conductive lines traversing the first conductive lines, variable resistance structures at intersecting points of the first conductive lines and the second conductive lines, and bottom electrodes between the first conductive lines and the variable resistance structures.Type: ApplicationFiled: January 12, 2018Publication date: January 17, 2019Inventors: Sungwon Kim, Sung-Ho Eun, Ilmok Park, Junghoon Park, Seulji Song, Ji-Hyun Jeong
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Publication number: 20170271581Abstract: A semiconductor memory device includes first conductive lines extending in a first direction on a substrate, second conductive lines extending in a second direction over the first conductive line, the first and the second conductive lines crossing each other at cross points, a cell structure positioned at each of the cross points, each of the cell structures having a data storage element, a selection element to apply a cell selection signal to the data storage element and to change a data state of the data storage element, and an electrode element having at least an electrode with a contact area smaller than that of the selection element, and an insulation pattern insulating the first and the second conductive lines and the cell structures from one another.Type: ApplicationFiled: February 22, 2017Publication date: September 21, 2017Inventors: Dong-Jun SEONG, Sung-Ho EUN, Soon-Oh PARK
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Patent number: 9768232Abstract: A variable resistance memory device including a substrate, a first insulation layer disposed on the substrate, first and second conductive lines, and memory units. The first conductive lines are arranged in a first direction on the first insulation layer and extend in a second direction. The second conductive lines are disposed over the first conductive lines, are arranged in the second direction, and extend in the first direction. The memory units are disposed in each area between the first and second conductive lines in a third direction and include a first electrode, a variable resistance pattern, a selection pattern, and a second electrode. The first electrode and the variable resistance pattern include a cross-section having an āLā shape. The variable resistance pattern contacts an upper surface of the first electrode. The second electrode is disposed on the variable resistance pattern. The selection pattern is disposed on the second electrode.Type: GrantFiled: October 19, 2016Date of Patent: September 19, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Sung-Ho Eun
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Publication number: 20170243922Abstract: A variable resistance memory device including a substrate, a first insulation layer disposed on the substrate, first and second conductive lines, and memory units. The first conductive lines are arranged in a first direction on the first insulation layer and extend in a second direction. The second conductive lines are disposed over the first conductive lines, are arranged in the second direction, and extend in the first direction. The memory units are disposed in each area between the first and second conductive lines in a third direction and include a first electrode, a variable resistance pattern, a selection pattern, and a second electrode. The first electrode and the variable resistance pattern include a cross-section having an āLā shape. The variable resistance pattern contacts an upper surface of the first electrode. The second electrode is disposed on the variable resistance pattern. The selection pattern is disposed on the second electrode.Type: ApplicationFiled: October 19, 2016Publication date: August 24, 2017Inventor: SUNG-HO EUN
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Patent number: 9559147Abstract: A semiconductor device includes first conductive lines and first and second insulation patterns on a substrate, first structures spaced apart from each other on the first conductive lines, a variable resistance pattern on the first structures, and a second electrode on the variable resistance pattern. The first conductive lines extend in a first direction. The first structures include a switching pattern and a first electrode sequentially stacked. The first insulation pattern fills a space between the first structures in a second direction and the first insulation pattern has a first top surface higher than a top surface of the first structures. The second insulation pattern fills a space between the first structures in the first direction, and the second insulation pattern has a second top surface higher than a top surface of the first structures. The variable resistance pattern fills an opening defined by the first and second insulation patterns.Type: GrantFiled: March 29, 2016Date of Patent: January 31, 2017Assignee: Samsung Electronics Co., Ltd.Inventor: Sung-Ho Eun
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Patent number: 9529421Abstract: A method for controlling a server connected to a photographing apparatus is provided. The control method includes receiving status information of the photographing apparatus from the photographing apparatus, searching a schedule for using the photographing apparatus from pre-stored scheduling information, determining whether the searched schedule and the status information of the photographing apparatus satisfy preset conditions, respectively, and transmitting notification information to a user terminal apparatus when the conditions are satisfied.Type: GrantFiled: November 4, 2013Date of Patent: December 27, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-dong Kim, Sung-ho Eun, Ki-deok Lee
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Publication number: 20160358976Abstract: A semiconductor device includes first conductive lines and first and second insulation patterns on a substrate, first structures spaced apart from each other on the first conductive lines, a variable resistance pattern on the first structures, and a second electrode on the variable resistance pattern. The first conductive lines extend in a first direction. The first structures include a switching pattern and a first electrode sequentially stacked. The first insulation pattern fills a space between the first structures in a second direction and the first insulation pattern has a first top surface higher than a top surface of the first structures. The second insulation pattern fills a space between the first structures in the first direction, and the second insulation pattern has a second top surface higher than a top surface of the first structures. The variable resistance pattern fills an opening defined by the first and second insulation patterns.Type: ApplicationFiled: March 29, 2016Publication date: December 8, 2016Inventor: SUNG-HO EUN
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Patent number: 8917331Abstract: A digital photographing apparatus and a method of controlling the same. A method of controlling a digital photographing apparatus, the method including determining whether a condition for changing an environment setup of the digital photographing apparatus is satisfied; if the condition is satisfied, searching for an environment setup to be changed according to the condition; and changing the environment setup according to the condition.Type: GrantFiled: November 19, 2010Date of Patent: December 23, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-ho Eun, Jeoung-gon Yoo
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Patent number: 8885063Abstract: A digital photographing apparatus and a method of controlling the same. A method of controlling a digital photographing apparatus, the method including determining whether a condition for changing an environment setup of the digital photographing apparatus is satisfied; if the condition is satisfied, searching for an environment setup to be changed according to the condition; and changing the environment setup according to the condition.Type: GrantFiled: November 19, 2010Date of Patent: November 11, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-ho Eun, Jeoung-gon Yoo