Patents by Inventor Sung Hoon Yun
Sung Hoon Yun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240144462Abstract: Disclosed are an apparatus and system for evaluating a welding condition on the basis of three-dimensional data. An aspect of the present embodiment provides an apparatus for evaluating a welding condition, the apparatus including a communication unit configured to receive a three-dimensional image for an evaluation target from the outside, a base material recognition unit configured to recognize a base material from the three-dimensional image for the evaluation target by using a point cloud, a bead extraction unit configured to extract a welding bead welded between the base materials, a bead cross-section acquisition unit configured to acquire cross-sections at preset intervals for the extracted welding bead, and a profile analysis unit configured to analyze a profile of the welding bead for the cross-section acquired by the bead cross-section acquisition unit.Type: ApplicationFiled: October 27, 2023Publication date: May 2, 2024Applicant: Korea Photonics Technology InstituteInventors: Hoe Min KIM, Sung Kuk CHUN, Seon Man KIM, Kwang Hoon LEE, Jeong Rok YUN, Un Yong KIM
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Patent number: 11934990Abstract: Disclosed is a an apparatus for performing smart logistics monitoring including a display unit, a memory, a sensor unit sensing at least one of a temperature, acceleration, humidity, illuminance, inclination, impact, and location of an inside of a logistics vehicle, and a control unit that generates respective status information of a logistics according to a sensed result at a predetermined period, generates a respective QR code indicating the respective status information, and displays the respective QR code on a screen of the display unit. The respective QR code is converted and displayed on the screen depending on an order in which the respective QR code is generated.Type: GrantFiled: January 7, 2022Date of Patent: March 19, 2024Assignee: Willog Co., Ltd.Inventors: Sung Hoon Bae, Ji Hyun Yun
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Patent number: 11917820Abstract: A method for fabricating semiconductor device includes forming an alternating stack that includes a lower multi-layered stack and an upper multi-layered stack by alternately stacking a dielectric layer and a sacrificial layer over a substrate, forming a vertical trench that divides the upper multi-layered stack into dummy stacks, and forming an asymmetric stepped trench that is extended downward from the vertical trench to divide the lower multi-layered stack into a pad stack and a dummy pad stack, wherein forming the asymmetric stepped trench includes forming a first stepped sidewall that is defined at an edge of the pad stack, and forming a second stepped sidewall that is defined at an edge of the dummy pad stack and occupies less area than the first stepped sidewall.Type: GrantFiled: July 6, 2021Date of Patent: February 27, 2024Assignee: SK hynix Inc.Inventors: Eun-Ho Kim, Eun-Joo Jung, Jong-Hyun Yoo, Ki-Jun Yun, Sung-Hoon Lee
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Patent number: 11759909Abstract: The embodiments relate to a polishing pad for use in a chemical mechanical planarization (CMP) process of semiconductors, to a process for preparing the same, and to a process for preparing a semiconductor device using the same. The polishing pad according to the embodiment adjusts the surface roughness characteristics of the polishing pad after polishing, whereby the polishing rate can be enhanced, and the surface residues, surface scratches, and chatter marks of the wafer can be remarkably reduced.Type: GrantFiled: June 16, 2021Date of Patent: September 19, 2023Assignee: SK ENPULSE CO., LTD.Inventors: Jae In Ahn, Kyung Hwan Kim, Sung Hoon Yun, Jang Won Seo, Kang Sik Myung
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Publication number: 20230197482Abstract: Through a combination of a multi-stage adhesive layer structure, a compressed region structure, and a barrier layer, the polishing pad according to the present disclosure can minimize the leakage of liquid components flowing through the interface between the window and the polishing pad and realize excellent long-term durability without leakage even when substantially applied to a polishing process for a long time. In the method for manufacturing a semiconductor device, the specific structure having the window of the polishing pad applied thereto as described above is combined with the optimal process conditions related to the polishing process so that the process efficiency can be further improved, and excellent quality can be secured in terms of polishing rate, polishing flatness, defect prevention, and the like.Type: ApplicationFiled: November 23, 2022Publication date: June 22, 2023Inventors: Chang Gyu IM, Jang Won SEO, Jong Wook YUN, Sung Hoon YUN
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Publication number: 20230158633Abstract: This invention relates to a polishing pad and a method for manufacturing the same. The polishing pad may include a top pad layer and a window block. The top pad layer may include a groove pattern formed on an upper surface of the top pad layer. A first hole may be formed through the top pad layer. The window block may be inserted into the first hole. The top pad layer and the window block may have a structure coincided with following Formula 1. 1.1 ? Gap + Thk RTPC Thk grv ? 3. Formula ? 1 In Formula 1, the gap may indicate a height difference between an upper surface of the top pad layer and an upper surface of the window block, the ThkRTPC may indicate a thickness of the window block, and the Thkgrv may indicate a depth of the groove pattern.Type: ApplicationFiled: October 20, 2022Publication date: May 25, 2023Inventors: Yu Jin HEO, Hyun Goo KANG, Go Un KIM, Jang Won SEO, Sung Hoon YUN
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Publication number: 20230111352Abstract: The present disclosure is to provide a polishing pad which is capable of providing physical properties corresponding to various polishing purposes for various polishing objects through the subdivided structural design in a thickness direction, and of securing environmental friendliness by applying a recycled or recyclable material to at least some components, in relation to disposal after use, unlike the conventional polishing pad. Specifically, the polishing pad includes a polishing layer, wherein the polishing layer includes a polishing variable layer having a polishing surface; and a polishing constant layer disposed on a rear surface side of the polishing variable layer opposite to the polishing surface, and wherein the polishing constant layer includes a cured product of a composition having thermosetting polyurethane particles and a binder.Type: ApplicationFiled: October 11, 2022Publication date: April 13, 2023Inventors: Jang Won SEO, Sung Hoon YUN, Eun Sun JOENG, Jae In AHN
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Publication number: 20230110921Abstract: The present disclosure is to provide a polishing pad which is capable of providing physical properties corresponding to various polishing purposes for various polishing objects through the subdivided structural design in a thickness direction, and of securing environmental friendliness by applying a recycled or recyclable material to at least some components, in relation to disposal after use, unlike the conventional polishing pad. Specifically, it includes a polishing layer, wherein the polishing layer includes a polishing variable layer having a polishing surface; and a polishing constant layer disposed on a rear surface side of the polishing variable layer opposite to the polishing surface.Type: ApplicationFiled: October 11, 2022Publication date: April 13, 2023Inventors: Jang Won Seo, Eun Sun Joeng, Sung Hoon Yun, Jong Wook Yun
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Publication number: 20230091382Abstract: The present disclosure relates to a method for refreshing a polishing pad, and, through increasing a useful life of a polishing pad used in a polishing process, is capable of reducing the amount of discarded polishing pad, and significantly enhancing polishing efficiency by shortening the time required to replace the polishing pad. In addition, a method for manufacturing a semiconductor device is a manufacturing process using the method for refreshing a polishing pad, wherein a polishing pad having the period of usage ended is reusable by having polishing performance equivalent to a new polishing pad, and process efficiency may be enhanced by reducing the number of replacements of polishing pads.Type: ApplicationFiled: September 16, 2022Publication date: March 23, 2023Inventors: Sung Hoon YUN, Jang Won SEO, Jae Gon CHOI
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Publication number: 20230059394Abstract: Provided are a polishing pad provided with a structural feature capable of maximizing the leakage prevention effect, the polishing pad including: a polishing layer including a first surface which is a polished surface and a second surface which is an opposite surface thereof, and including a first through hole passing through the first surface and the second surface; a window disposed in the first through hole; and a support layer disposed at the second surface of the polishing layer.Type: ApplicationFiled: July 1, 2022Publication date: February 23, 2023Inventors: Sung Hoon YUN, Jang Won SEO, Hye Young HEO, Jong Wook YUN, Jae In AHN
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Publication number: 20230052322Abstract: The present disclosure is intended to provide, as a polishing pad to which a window for an endpoint detection is applied, and in which the window is capable of providing improved polishing performance in terms of preventing defects, etc., by a specific structure due to the window, rather than negatively affecting polishing performance as a local heterogeneous component on the polishing pad, a polishing pad including: a polishing layer including a first surface that is a polishing surface and a second surface that is a rear surface thereof, and containing a first through-hole penetrating from the first surface to the second surface; a window disposed in the first through-hole; and a void between a side surface of the first through-hole and a side surface of the window, and a method for manufacturing a semiconductor device by applying the same.Type: ApplicationFiled: July 27, 2022Publication date: February 16, 2023Inventors: Sung Hoon YUN, Jae In Ahn, Kyung Hwan Kim, Jang Won Seo
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Publication number: 20220371155Abstract: The present disclosure relates to a polishing pad, a method for manufacturing the polishing pad, and a method for manufacturing a semiconductor device using the polishing pad, and the present disclosure can prevent an error in detecting the end point due to the window in the polishing pad by minimizing the effect on transmittance according to the surface roughness of the window in the polishing pad in the polishing process, and allows the fluidity and loading rate of the polishing slurry in the polishing process to be implemented at similar levels by maintaining the surface roughness difference between the polishing layer and the window in the polishing pad within the predetermined range, thereby enabling the problem of deterioration of polishing performance due to the surface difference between the polishing layer and the window to be prevented. Further, a method for manufacturing a semiconductor device to which a polishing pad is applied may be provided.Type: ApplicationFiled: May 3, 2022Publication date: November 24, 2022Inventors: Sung Hoon YUN, Jae In AHN, Eun Sun Joeng, Jang Won Seo
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Publication number: 20220288743Abstract: The present invention relates to a polishing pad, a method for producing the same, and a method of fabricating a semiconductor device using the same. According to the present invention, it is possible to prevent defects from occurring due to an inorganic component contained in a polishing layer during a polishing process, by limiting the content range of the inorganic component contained in the polishing layer. In addition, an unexpanded solid foaming agent is contained in a polishing composition for producing a polishing layer and is expanded during a curing process to form a plurality of uniform pores in the polishing layer, and the content range of the inorganic component contained in the polishing layer, thereby preventing defects from occurring during the polishing process.Type: ApplicationFiled: March 11, 2022Publication date: September 15, 2022Inventors: Jong Wook YUN, Eun Sun JOENG, Sung Hoon YUN, Hye Young HEO, Jang Won SEO
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Publication number: 20220176514Abstract: A polishing pad sheet which provides optimized interfacial properties for the laminated structure of a polishing pad based on appropriate elasticity and high durability, and in which the polishing pad having the polishing pad sheet applied thereto not only has its intrinsic function such as the polishing rate or the like, but also is capable of realizing the function without damage even during the polishing process in a wet environment for a long time, and a polishing pad to which the polishing pad sheet is applied. The polishing pad sheet includes: a first surface which is a polishing layer attachment surface; and a second surface which is a rear surface of the first surface, wherein the first surface has a value of the following Equation 1 of 4.20 to 5.50: 4.20?(|Sv|)/Sz×P (%)?5.50.Type: ApplicationFiled: December 7, 2021Publication date: June 9, 2022Inventors: Sung Hoon YUN, Kyung Hwan Kim, Jae In Ahn, Jang Won Seo
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Publication number: 20210394334Abstract: The embodiments relate to a polishing pad for use in a chemical mechanical planarization (CMP) process of semiconductors, to a process for preparing the same, and to a process for preparing a semiconductor device using the same. The polishing pad according to the embodiment adjusts the surface roughness characteristics of the polishing pad after polishing, whereby the polishing rate can be enhanced, and the surface residues, surface scratches, and chatter marks of the wafer can be remarkably reduced.Type: ApplicationFiled: June 16, 2021Publication date: December 23, 2021Inventors: Jae In AHN, Kyung Hwan KIM, Sung Hoon YUN, Jang Won SEO, Kang Sik MYUNG
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Publication number: 20210394335Abstract: The embodiments relate to a polishing pad for use in a chemical mechanical planarization (CMP) process of semiconductors, to a process for preparing the same, and to a process for preparing a semiconductor device using the same. The polishing pad according to the embodiment adjusts the surface roughness characteristics of the polishing pad after polishing, whereby the polishing rate can be enhanced, and the surface residues, surface scratches, and chatter marks of the wafer can be remarkably reduced.Type: ApplicationFiled: June 16, 2021Publication date: December 23, 2021Inventors: Jae In AHN, Kyung Hwan KIM, Sung Hoon YUN, Jang Won SEO, Kang Sik MYUNG
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Patent number: 10237195Abstract: An improved IP video playback system for quicker access and better user experience during IP video playback is provided. Aspects of the IP video playback system allow a content service provider to provide quicker access to requested content items. When a user requests access to content items, an analysis is performed to calculate the lengths of time in which a portion of the content item can be downloaded, cached, and displayed and the corresponding size of that portion. The analysis may be based on various parameters. Once the analysis is performed and the portion is downloaded, playback may begin and the process may be repeated as necessary with increasing portion sizes until a predetermined portion size is reached, the user indicates a content switch, or the content item has been fully downloaded.Type: GrantFiled: May 13, 2015Date of Patent: March 19, 2019Assignee: COX COMMUNICATIONS, INC.Inventors: Slavisha Karach, Sung Hoon Yun, Muhammad Asif Raza
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Publication number: 20110299590Abstract: An error resilient coding method using adaptive additional image information is provided comprising determining a priority order of header data, adaptively configuring additional image information according to the priority order, and coding the additional image information and adding the coded additional image information to original image information.Type: ApplicationFiled: February 9, 2011Publication date: December 8, 2011Inventors: Ju Hun Nam, Woon Moon Lee, Sung Hoon Yun, Jin Hyung Kim, Sung Jea Ko
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Patent number: D1022734Type: GrantFiled: November 22, 2021Date of Patent: April 16, 2024Assignee: Willog Co., Ltd.Inventors: Sung Hoon Bae, Ji Hyun Yun