Patents by Inventor Sung-Hung Yeh

Sung-Hung Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7696801
    Abstract: The present invention discloses a reset method for a digital circuit. The method includes: providing a clock signal to the digital circuit; keeping the clock signal at a logic level according to a first indicating signal; generating a reset signal for resetting the digital circuit; and recovering the clock signal to the digital circuit according to a second indicating signal.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: April 13, 2010
    Assignee: Realtek Semiconductor Corp.
    Inventors: Sung-Hung Yeh, Kuo-Uei Yang
  • Publication number: 20090238259
    Abstract: A method for encoding a video frame includes segmenting a video frame into a plurality of frame segments; compressing a frame segment according to a plurality of compression rates to generate a plurality of coded outputs; selecting an actual coded output from the plurality of coded outputs based on a target rate; and packing the actual coded output to generate compressed data. A video frame encoder includes: a segment unit used for segmenting a video frame into a plurality of frame segments; a data compressing module used for compressing a frame segment according to a plurality of compression rates to generate a plurality of coded outputs; a selecting module used for selecting an actual coded output from the plurality of coded outputs based on a target rate; and a packing unit used for packing the actual coded output to generate compressed data.
    Type: Application
    Filed: March 19, 2008
    Publication date: September 24, 2009
    Inventor: Sung-Hung Yeh
  • Publication number: 20070290732
    Abstract: The present invention discloses a reset method for a digital circuit. The method includes: providing a clock signal to the digital circuit; keeping the clock signal at a logic level according to a first indicating signal; generating a reset signal for resetting the digital circuit; and recovering the clock signal to the digital circuit according to a second indicating signal.
    Type: Application
    Filed: May 30, 2007
    Publication date: December 20, 2007
    Inventors: Sung-Hung Yeh, Kuo-Uei Yang