Patents by Inventor Sung Hwan Seo

Sung Hwan Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145913
    Abstract: The present disclosure relates to a phase shifter and a communication device including the same, and particularly, to a phase shifter including a base panel; a fixed substrate which is laminated and fixed on one side or another side on the base panel and has a plurality of circuit patterns printed on the top surface thereof; and a phase shift switching part provided with a plurality of movable substrates including movable strip terminal which are in contact with the plurality of circuit patterns of the fixed substrate, wherein the phase shift switching part is configured to reciprocate the plurality of movable substrates within a predetermined distance in a horizontal direction on the base panel to change the positions of contact points of the movable substrates with respect to the circuit patterns, wherein the phase shift switching part moves the plurality of movable substrates while elastically supporting the plurality of movable substrates toward the circuit patterns, thereby providing an advantage of maxi
    Type: Application
    Filed: January 7, 2024
    Publication date: May 2, 2024
    Applicant: KMW INC.
    Inventors: Sung Hwan SO, Oh Seog CHOI, Seong Man KANG, Hyoung Seok YANG, Yong Won SEO, Cha Gun GANG
  • Publication number: 20240145939
    Abstract: A dual polarization antenna is disclosed in at least one embodiment of the present disclosure, including a base substrate, a power feeding unit supported on the base substrate, and a radiating plate supported on the power feeding unit, the power feeding unit includes a first feeding substrate and a second feeding substrate arranged to cross each other on the base substrate, the first feeding substrate includes a first feed line configured to supply a first reference phase signal to a first point on the radiating plate and to supply a first reverse phase signal having a reverse phase relative to the first reference phase signal, to a second point on the radiating plate, the second feeding substrate includes a second feed line configured to supply a second reference phase signal to a third point on the radiating plate and to supply a second reverse phase signal having a reverse phase relative to the second reference phase signal, to a fourth point on the radiating plate, and wherein the first feeding substrate
    Type: Application
    Filed: December 15, 2023
    Publication date: May 2, 2024
    Applicant: KMW INC.
    Inventors: Sung Hwan SO, Oh Seog CHOI, Seong Man KANG, Yong Won SEO, Myung Hwa KIM, Su Yong LEE
  • Patent number: 11969397
    Abstract: The present invention relates to a composition for preventing or treating transplantation rejection or a transplantation rejection disease, comprising a novel compound and a calcineurin inhibitor. A co-administration of the present invention 1) reduces the activity of pathogenic Th1 cells or Th17 cells, 2) increases the activity of Treg cells, 3) has an inhibitory effect against side effects, such as tissue damage, occurring in the sole administration thereof, 4) inhibits various pathogenic pathways, 5) inhibits the cell death of inflammatory cells, and 6) increases the activity of mitochondria, in an in vivo or in vitro allogenic model, a transplantation rejection disease model, a skin transplantation model, and a liver-transplanted patient, and thus inhibits transplantation rejection along with mitigating side effects possibly occurring in the administration of a conventional immunosuppressant alone.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: April 30, 2024
    Assignee: THE CATHOLIC UNIVERSITY OF KOREA INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Mi-La Cho, Dong-Yun Shin, Jong-Young Choi, Chul-Woo Yang, Sung-Hwan Park, Seon-Yeong Lee, Min-Jung Park, Joo-Yeon Jhun, Se-Young Kim, Hyeon-Beom Seo, Jae-Yoon Ryu, Keun-Hyung Cho
  • Publication number: 20240129211
    Abstract: An apparatus for predicting a traffic speed and a method thereof are provided. The apparatus includes an input device that receives traffic speed sequences of a plurality of links and a controller that detects a spatio-temporal relationship between traffic speeds of the plurality of links and predicts a future traffic speed of a target link based on the spatio-temporal relationship between the traffic speeds of the plurality of links.
    Type: Application
    Filed: March 6, 2023
    Publication date: April 18, 2024
    Inventors: Nam Hyuk Kim, Tae Heon Kim, Sung Hwan Park, Sang Wook Kim, Jun Ho Song, Ji Won Son, Dong Hyuk Seo
  • Patent number: 9714001
    Abstract: A pedestrian protection apparatus of a vehicle includes a first pressure sensor installed at a first side of a front side of the vehicle and a second pressure sensor installed at a second side of the front side of the vehicle. A hollow tube extends between and is connected with each of the first and second pressure sensors. A control unit is configured to receive pressure values output by the first and second pressure sensors and determine whether a collision object is a pedestrian based on the received pressure values.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: July 25, 2017
    Assignee: Hyundai Mobis Co., Ltd.
    Inventor: Sung Hwan Seo
  • Publication number: 20150291122
    Abstract: A pedestrian protection apparatus of a vehicle includes a first pressure sensor installed at a first side of a front side of the vehicle and a second pressure sensor installed at a second side of the front side of the vehicle. A hollow tube extends between and is connected with each of the first and second pressure sensors. A control unit is configured to receive pressure values output by the first and second pressure sensors and determine whether a collision object is a pedestrian based on the received pressure values.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 15, 2015
    Inventor: Sung Hwan SEO
  • Patent number: 6377496
    Abstract: A word line voltage regulation circuit includes a first comparator for comparing a first reference voltage and the potential of an output node; a first switching element for supplying the supply voltage to the output node depending on the output signal of the first comparator; a second comparator for comparing a second reference voltage and the potential of the output node; a second switching element for regulating the potential of the output node depending on the output signal of the second comparator; a third switching element for transmitting the potential of the output node to a decoder circuit depending on a first control signal; and a fourth switching element for supplying the supply voltage to the decoder circuit depending on a second control signal.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: April 23, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Poong Yeub Lee, Im Cheol Ha, Kye Wan Shin, Oh Won Kwon, Sung Hwan Seo
  • Patent number: 6329852
    Abstract: The present invention relates to a power on reset circuit capable of stabilizing an operation of a chip by generating a reset signal regardless of a ramp up time of a power supply voltage, and includes a first means for controlling a potential of a first node to a first potential according to a potential of a second node, a second means for supplying the power supply voltage to be ramped up to the second node according to the potential of the first node, a third means for determining a potential of a third node by inverting and delaying the potential of the second node, a fourth means for controlling a potential of a fourth node to a second potential according to the potential of the third node, a fifth means for inverting and delaying the potential of the fourth node, a sixth means for outputting the potential of the third node to an output terminal according to an output signal from said fifth means and its inverted signal, and a seventh means for controlling a signal of the output terminal according to the
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: December 11, 2001
    Assignee: Hyundai Electronics Industries Co., Inc.
    Inventor: Sung Hwan Seo
  • Patent number: 6185129
    Abstract: There is disclosed a power reset circuit of a flash memory device, which is characterized in that it comprises a first bootstrap circuit for raising the voltage level of a first node into a higher level upon a power-up; a latch means for inverting the voltage level of said first node; a voltage detector operable depending on the output of said latch means, for outputting a low level or a high level of signal depending on the level of the supply voltage; a second bootstrap circuit for raising the voltage level of a second node into a high level upon a power-up; a delay means for delaying and outputting the voltage level of said second node, a transfer means operable depending on the output of said delay means, for transferring the output of said voltage detector; and a feedback means for feedbacking the output of said voltage detector to said first node and said second node.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: February 6, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Sung Hwan Seo
  • Patent number: 6114886
    Abstract: A preset signal generation circuit comprises a transfer gate for transferring a previously sensed data according to a delayed preset enable signal before the preset signal generation circuit is enabled; delay means for outputting a delayed preset enable signal by delaying a preset enable signal; latch means for storing an output signal of the transfer gate; a first logic element for combining an inverted signal of the delayed preset enable signal and an inverted output signal of the latch means; a first drive means for outputting a source voltage or a ground voltage according to an output signal of the first logic element; a first preset signal control means for controlling an output of the first drive means by having as inputs the preset enable signal and the previously sensed data; a second logic element for combining the delayed preset enable signal and an inverted output signal of the latch means; a second drive means for outputting the source voltage or ground voltage according to an output of the second
    Type: Grant
    Filed: April 20, 1999
    Date of Patent: September 5, 2000
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Sung Hwan Seo