Patents by Inventor Sung-II Chang

Sung-II Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9595582
    Abstract: A metal-oxide-semiconductor field-effect transistor device includes a first active area, a first gate electrode configured to cross the first active area and extend in a Y direction, and define a first source area and a first drain area, first gate contacts disposed on the first gate electrode to align on a first virtual gate passing line extending in the Y direction, first source contacts disposed on the first source area to align on a first virtual source passing line extending in the Y direction, and first drain contacts disposed on the first drain area to align on a first virtual drain passing line extending in the Y direction, wherein at least one of the first drain contacts is disposed to align on any one of first virtual X-straight lines configured to pass between the first source contacts and extend parallel in an X direction perpendicular to the Y direction.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: March 14, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Hoon Lee, Nok-Hyun Ju, Hyeong-Mo Yang, Sung-Ii Chang, Chan-Ho Lee
  • Publication number: 20150372085
    Abstract: A metal-oxide-semiconductor field-effect transistor device includes a first active area, a first gate electrode configured to cross the first active area and extend in a Y direction, and define a first source area and a first drain area, first gate contacts disposed on the first gate electrode to align on a first virtual gate passing line extending in the Y direction, first source contacts disposed on the first source area to align on a first virtual source passing line extending in the Y direction, and first drain contacts disposed on the first drain area to align on a first virtual drain passing line extending in the Y direction, wherein at least one of the first drain contacts is disposed to align on any one of first virtual X-straight lines configured to pass between the first source contacts and extend parallel in an X direction perpendicular to the Y direction.
    Type: Application
    Filed: February 25, 2015
    Publication date: December 24, 2015
    Inventors: Jae-Hoon Lee, Nok-Hyun Ju, Hyeong-Mo Yang, Sung-II Chang, Chan-Ho Lee
  • Patent number: 9177965
    Abstract: A nonvolatile memory device includes a substrate, a stacked structure with conductive materials and first insulating materials and the conductive materials and the first insulating materials are alternately stacked on the substrate, and a plurality of pillars in contact with the substrate and the pillars extend through the stacked structure in a direction perpendicular to the substrate. The device also includes information storage layers between the conductive materials and the first insulating materials, and second insulating materials between the first insulating materials and the pillars.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: November 3, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Changhyun Lee, Sung-II Chang, Byoungkeun Son
  • Publication number: 20150084114
    Abstract: A non-volatile memory device may include a semiconductor substrate and an isolation layer on the semiconductor substrate wherein the isolation layer defines an active region of the semiconductor substrate. A tunnel insulation layer may be provided on the active region of the semiconductor substrate, and a charge storage pattern may be provided on the tunnel insulation layer. An interface layer pattern may be provided on the charge storage pattern, and a blocking insulation pattern may be provided on the interface layer pattern. Moreover, the block insulation pattern may include a high-k dielectric material, and the interface layer pattern and the blocking insulation pattern may include different materials. A control gate electrode may be provided on the blocking insulating layer so that the blocking insulation pattern is between the interface layer pattern and the control gate electrode. Related methods are also discussed.
    Type: Application
    Filed: November 26, 2014
    Publication date: March 26, 2015
    Inventors: Juhyung KIM, Changseok Kang, Sung-II Chang, Jungdal Choi
  • Publication number: 20140183615
    Abstract: A non-volatile memory device may include a semiconductor substrate and an isolation layer on the semiconductor substrate wherein the isolation layer defines an active region of the semiconductor substrate. A tunnel insulation layer may be provided on the active region of the semiconductor substrate, and a charge storage pattern may be provided on the tunnel insulation layer. An interface layer pattern may be provided on the charge storage pattern, and a blocking insulation pattern may be provided on the interface layer pattern. Moreover, the block insulation pattern may include a high-k dielectric material, and the interface layer pattern and the blocking insulation pattern may include different materials. A control gate electrode may be provided on the blocking insulating layer so that the blocking insulation pattern is between the interface layer pattern and the control gate electrode. Related methods are also discussed.
    Type: Application
    Filed: January 24, 2014
    Publication date: July 3, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ju-Hyung Kim, Sung-II CHANG, Chang-Seok KANG, Jung-Dal CHOI
  • Publication number: 20120104484
    Abstract: A nonvolatile memory device includes a substrate, a stacked structure with conductive materials and first insulating materials and the conductive materials and the first insulating materials are alternately stacked on the substrate, and a plurality of pillars in contact with the substrate and the pillars extend through the stacked structure in a direction perpendicular to the substrate. The device also includes information storage layers between the conductive materials and the first insulating materials, and second insulating materials between the first insulating materials and the pillars.
    Type: Application
    Filed: October 24, 2011
    Publication date: May 3, 2012
    Inventors: Changhyun LEE, Sung-II Chang, Byoungkeun Son