Abstract: A low power system on chip for supporting partial clock gating is provided. The system on chip includes a network on chip including a first CG-network interface module, a second CG-network interface module, and a clock gating control module, a first IP block that communicates through the first CG-network interface module, and a second IP block that communicates through the second CG-network interface module. The clock gating control module receives a clock gating request from the first IP block, outputs a communication control signal to the second CG-network interface module in response to the received clock gating request, and performs a clock gating operation for a clock signal in response to the received clock gating request to selectively deliver the clock signal to the second IP block.

Abstract: A gripper includes a body portion, a deformation extension portion and a driving unit. The deformation extension portion has a gripping surface on which an object is gripped. The deformation extension portion is connected to a side surface of the body portion. The driving unit is configured to apply a force to the deformation extension portion.

Abstract: A display device includes: a substrate; a transparent electrode on one surface of the substrate; a reflective electrode on the transparent electrode; a transistor on the reflective electrode; and a light emitting element between the transparent electrode and the reflective electrode. The transistor overlaps the light emitting element.

Abstract: A substrate transferring apparatus includes a support plate including an upper surface on which a substrate is configured to be seated, and a vacuum pad detachably coupled to the support plate and configured to vacuum suction the substrate to fix the substrate on the upper surface of the support plate, wherein the vacuum pad includes a suction area and a support protrusion surrounding the suction area, an upper surface of the support protrusion is at a higher vertical level than an upper surface of the suction area to support the substrate, and the upper surface of the support protrusion is inclined relative to horizontal.

Abstract: A connector assembly according to the present invention comprises a receptacle connector and a plug connector vertically coupled to the receptacle connector, the plug connector including: a signal pin having one side in electrical contact with a signal line of a cable and the other side in elastic contact with a clip pin of the receptacle connector; a shield can formed to enclose the signal pin such that the other side of the signal pin is exposed downwards and to be electrically spaced apart from the signal pin; a first insulating member coupled to the signal pin to insulate between the signal pin and the shield can; and a plug shell which has an open lower portion and encloses an upper surface and a side surface of the shield can to expose the other side of the signal pin downwards, the receptacle connector including: a clip pin which has a lower portion in contact with a signal pad of a circuit board and an upper portion in elastic contact with the other side of the signal pin; a receptacle base which is f

Abstract: Disclosed is a cable adaptor comprising a first member which is conductive and comes into contact with a signal pin of the cable, a second member disposed outside the first member and coupled to the first member, a third member which is conductive and disposed outside the second member, and a contact pin fixed to the first member. Here, the first member includes a first body coupled to the second member and a first contact portion which extends from the first body and comes into contact with the signal pin. The third member includes a second body coupled to the second member and a second contact portion which extends from the second body and comes into contact with the outer conductor. A plurality of first contact points of the signal pin and the first contact portion are arranged at same intervals along a circumferential direction of the signal pin.

Abstract: A composition for a photoelectric device includes a p-type semiconductor compound represented by Chemical Formula 1 and an n-type semiconductor compound, and an image sensor and an electronic device including the same: In Chemical Formula 1, each substituent is the same as defined in the detailed description.

Abstract: The present invention relates to an antibody for identifying phosphospecific reactions of threonine at position 1010 in the amino acid sequence of non-SMC condensin II complex subunit G2 (NCAPG2), and a use thereof. It has been identified that: an antibody for identifying whether threonine at position 1010 in the amino acid sequence of NCAPG2 is phosphorylated, according to the present invention, has high selectivity and avidity with respect to pT1010 of NCAPG2; the reactivity thereof to pT1010 of NCAPG2 is inhibited in cancer cells treated with inhibitors of kinases for regulating cellular mitosis phase, such as CDK1, PLK1, Mps1, and aurora kinase; and detection of the antibody is far higher in tumor tissues than non-tumor tissues of a cancer patient through immunohistochemical staining.

Abstract: Disclosed is a cable adaptor which is connected to a cable including an outer conductor. The adaptor includes a contact pin which comes into contact with a signal pin of the cable, a first member which is conductive and disposed inside and coupled to the contact pin, a second member disposed outside and coupled to the contact pin, and a third member which is conductive and disposed outside the second member. Here, the contact pin includes a first body coupled to the second member, a first contact portion which is conductive and extends from one side of the first body to come into contact with the signal pin, and a second contact portion which extends from the other side of the first body and comes into contact with an object being tested. The third member includes a second body coupled to the second member and a third contact portion.

Abstract: Disclosed is a semiconductor device including a first channel layer on a substrate, and a second channel layer on the first channel layer, the first and second channel layers extending in a first direction while being spaced apart from the substrate, and including a 2D semiconductor material, a gate structure on the substrate, the gate structure extending in a second direction, and being penetrated by the first and second channel layers, and source/drain contacts on side surfaces of the gate structure and being connected to the first and second channel layers. The gate structure includes a first gate portion between the substrate and the first channel layer and having a first gate length, a second gate portion between the first and second channel layers and having a second gate length, and a third gate portion on an upper surface of the second channel layer and having a third gate length.

Abstract: A semiconductor package, comprising a redistribution substrate including an insulating layer and a first redistribution pattern; and a semiconductor chip electrically connected to the redistribution substrate, wherein the first redistribution pattern comprises a first barrier layer; a second barrier layer on the first barrier layer; and a via structure on the second barrier layer, wherein the first barrier layer comprises a first conductive material and the second barrier layer comprises a second conductive material different from the first conductive material.

Abstract: The present invention relates to a double-stranded oligonucleotide which can highly specifically and efficiently inhibit an amphiregulin expression and, preferably, a double-stranded oligonucleotide comprising a sequence in the form of RNA/RNA, DNA/DNA or DNA/RNA hybrid, a double-stranded oligonucleotide structure comprising the double-stranded oligonucleotide, nanoparticles comprising the double-stranded oligonucleotide structure, and a fibrosis or respiratory disease preventive or therapeutic use thereof.

Abstract: Provided is a diaphragm pump. The diaphragm pump operates such that a viscous liquid is discharged by transferring a pressing force via a diaphragm that is elastically deformed. The diaphragm pump has a structure capable of rapidly and accurately discharging the viscous liquid of high viscosity by using a diaphragm. Also, the diaphragm pump is capable of effectively pressing the viscous liquid while preventing the damage to the particles contained in the viscous liquid, by preventing the mechanical structure pressing the viscous liquid from coming into direct contact with the viscous liquid.

Abstract: A semiconductor device is provided. The semiconductor device includes an active pattern extending in a first horizontal direction, a plurality of lower nanosheets stacked on the active pattern and spaced apart from one another in a vertical direction, a separation layer on the plurality of lower nanosheets, a plurality of upper nanosheets stacked on the separation layer and spaced apart from one another in the vertical direction, a gate electrode extending on the active pattern in a second horizontal direction, the gate electrode surrounding each of the plurality of lower nanosheets, the separation layer and the plurality of upper nano sheets, and a first conductive layer between the gate electrode and each of a top surface and a bottom surface of the plurality of upper nanosheets. The first conductive layer is not between the gate electrode and sidewalls of the plurality of upper nanosheets.

Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.

Abstract: An adhesive-type insect trap includes a body having a hole for insertion of an adhesive sheet; a light source mounting unit disposed on the body; and a cover which is detachably mounted on the body and has a through-hole in at least a part thereof, and an adhesive sheet including a sticky substance and a sheet. The body includes a guide unit by which the adhesive sheet is guided, and the cover comprises a light refraction unit therein or on a surface thereof.

Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.

Abstract: An adhesive-type insect trap includes a main body having an adhesive sheet insertion hole; a light source mounting unit disposed on the main body; a cover which is detachably mounted on the main body and has a through-hole in at least a part thereof; an adhesive sheet including a sticky substance and a sheet. The main body includes a guide unit by which the adhesive sheet is guided, and an adhesive sheet support unit for supporting the adhesive sheet.

Abstract: There is provided a semiconductor device having reduced contact resistance and enhanced performance. The semiconductor device includes a substrate, a first active pattern spaced apart from the substrate and extending in a first direction, and including a first two-dimensional semiconductor material, a first gate electrode extending in a second direction intersecting the first direction on the substrate, and through which the first active pattern penetrates, and a first source/drain contact which includes a first contact insertion film and a first filling metal film sequentially stacked on a side surface of the first gate electrode, and is connected to the first active pattern, wherein the first contact insertion film at least partially surrounds a lower surface, a side surface and an upper surface of an end portion of the first active pattern, and the first active pattern and the first contact insertion film form an ohmic contact.

Abstract: A semiconductor device having high performance and a high degree of integration includes a substrate, a first transistor disposed on the substrate, the first transistor comprising a first active pattern including a first two-dimensional semiconductor material, a first gate electrode through which the first active pattern penetrates, and a first source/drain contact connected to the first active pattern on a side surface of the first gate electrode, a second transistor disposed on an upper surface of the first transistor, the second transistor comprising a second active pattern including a second two-dimensional semiconductor material, a second gate electrode through which the second active pattern penetrates, and a second source/drain contact connected to the second active pattern on a side surface of the second gate electrode, and a first wiring structure interposed between the first transistor and the second transistor, and electrically connecting the first transistor and the second transistor.