Patents by Inventor Sung In SUH

Sung In SUH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11945798
    Abstract: Provided are aminopyridine compounds and pharmaceutically acceptable compositions thereof which exhibit inhibition activity against certain mutated forms of EGFR.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: April 2, 2024
    Assignees: YUHAN CORPORATION, JANSSEN BIOTECH, INC.
    Inventors: Hyunjoo Lee, Su Bin Choi, Young Ae Yoon, Kwan Hoon Hyun, Jae Young Sim, Marian C. Bryan, Scott Kuduk, James Campbell Robertson, Jaekyoo Lee, Paresh Devidas Salgaonkar, Byung-Chul Suh, Jong Sung Koh, So Young Hwang
  • Patent number: 11950412
    Abstract: A memory device is described. Generally, the device includes a string of memory transistors, a source select transistor coupled to a first end of the string of memory transistor and a drain select transistor coupled to a second end of the string of memory transistor. Each memory transistor includes a gate electrode formed adjacent to a charge trapping layer and there is neither a source nor a drain junction between adjacent pairs of memory transistors or between the memory transistors and source select transistor or drain select transistor. In one embodiment, the memory transistors are spaced apart from adjacent memory transistors and the source select transistor and drain select transistor, such that channels are formed therebetween based on a gate fringing effect associated with the memory transistors. Other embodiments are also described.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: April 2, 2024
    Assignee: Longitude Flash Memory Solutions LTD.
    Inventors: Youseok Suh, Sung-Yong Chung, Ya-Fen Lin, Yi-Ching Jean Wu
  • Publication number: 20230348664
    Abstract: The present invention provides a polyester polymer having improved heat discoloration and at the same time, having a high molecular weight.
    Type: Application
    Filed: September 1, 2021
    Publication date: November 2, 2023
    Inventors: Young Sung SUH, No Woo PARK, Ho Sub KIM, Choong Hee HONG, Kyung Gyu NOH, Ki Hyun PARK
  • Publication number: 20230348666
    Abstract: The present invention provides a novel catalyst material used to produce polyester having improved molecular weight and color from a dicarboxylic acid aromatic heterocyclic compound or a derivative thereof.
    Type: Application
    Filed: September 13, 2021
    Publication date: November 2, 2023
    Inventors: Ho Sub KIM, Kyung Gyu NOH, Young Sung SUH, Choong Hee HONG, Ki Hyun PARK, No Woo PARK
  • Patent number: 11588039
    Abstract: A semiconductor device includes an active region in a substrate, at least one nano-sheet on the substrate and spaced apart from a top surface of the active region, a gate above or below the nano-sheet, a gate insulating layer between the at least one nano-sheet and the gate, and source/drain regions on the active region at both sides of the at least one nano-sheet. The at least one nano-sheet includes a channel region; a gate disposed above or below the nano-sheet and including a single metal layer having different compositions of metal atoms of a surface and an inside thereof; a gate insulating layer between the nano-sheet and the gate; and source/drain regions disposed in the active region of both sides of the at least one nano-sheet.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: February 21, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-hyeong Lee, Hoon-joo Na, Sung-in Suh, Min-woo Song, Byoung-hoon Lee, Hu-yong Lee, Sang-jin Hyun
  • Patent number: 11177364
    Abstract: Provided are an integrated circuit device and a method of manufacturing the same. The integrated circuit device includes: a semiconductor substrate; a device isolation layer defining an active region of the semiconductor substrate; a gate insulating layer on the active region; a gate stack on the gate insulating layer; a spacer on a sidewall of the gate stack; and an impurity region provided on both sides of the gate stack, wherein the gate stack includes a metal carbide layer and a metal layer on the metal carbide layer, wherein the metal carbide layer includes a layer having a carbon content of about 0.01 at % to about 15 at %.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: November 16, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byoung-Hoon Lee, Hoon-Joo Na, Sung-In Suh, Min-Woo Song, Chan-Hyeong Lee, Hu-Yong Lee, Sang-Jin Hyun
  • Publication number: 20200365706
    Abstract: Provided are an integrated circuit device and a method of manufacturing the same. The integrated circuit device includes: a semiconductor substrate; a device isolation layer defining an active region of the semiconductor substrate; a gate insulating layer on the active region; a gate stack on the gate insulating layer; a spacer on a sidewall of the gate stack; and an impurity region provided on both sides of the gate stack, wherein the gate stack includes a metal carbide layer and a metal layer on the metal carbide layer, wherein the metal carbide layer includes a layer having a carbon content of about 0.01 at % to about 15 at %.
    Type: Application
    Filed: July 24, 2020
    Publication date: November 19, 2020
    Inventors: Byoung-Hoon Lee, HOON-JOO NA, SUNG-IN SUH, MIN-WOO SONG, CHAN-HYEONG LEE, HU-YONG LEE, SANG-JIN HYUN
  • Patent number: 10756195
    Abstract: Provided are an integrated circuit device and a method of manufacturing the same. The integrated circuit device includes: a semiconductor substrate; a device isolation layer defining an active region of the semiconductor substrate; a gate insulating layer on the active region; a gate stack on the gate insulating layer; a spacer on a sidewall of the gate stack; and an impurity region provided on both sides of the gate stack, wherein the gate stack includes a metal carbide layer and a metal layer on the metal carbide layer, wherein the metal carbide layer includes a layer having a carbon content of about 0.01 at % to about 15 at %.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: August 25, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byoung-Hoon Lee, Hoon-Joo Na, Sung-In Suh, Min-Woo Song, Chan-Hyeong Lee, Hu-Yong Lee, Sang-Jin Hyun
  • Publication number: 20200098882
    Abstract: A semiconductor device includes an active region in a substrate, at least one nano-sheet on the substrate and spaced apart from a top surface of the active region, a gate above or below the nano-sheet, a gate insulating layer between the at least one nano-sheet and the gate, and source/drain regions on the active region at both sides of the at least one nano-sheet. The at least one nano-sheet includes a channel region; a gate disposed above or below the nano-sheet and including a single metal layer having different compositions of metal atoms of a surface and an inside thereof; a gate insulating layer between the nano-sheet and the gate; and source/drain regions disposed in the active region of both sides of the at least one nano-sheet.
    Type: Application
    Filed: November 25, 2019
    Publication date: March 26, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chan-hyeong LEE, Hoon-joo Na, Sung-in Suh, Min-woo Song, Byoung-hoon Lee, Hu-yong Lee, Sang-jin Hyun
  • Patent number: 10529816
    Abstract: A semiconductor device includes an active region in a substrate, at least one nano-sheet on the substrate and spaced apart from a top surface of the active region, a gate above or below the nano-sheet, a gate insulating layer between the at least one nano-sheet and the gate, and source/drain regions on the active region at both sides of the at least one nano-sheet. The at least one nano-sheet includes a channel region; a gate disposed above or below the nano-sheet and including a single metal layer having different compositions of metal atoms of a surface and an inside thereof; a gate insulating layer between the nano-sheet and the gate; and source/drain regions disposed in the active region of both sides of the at least one nano-sheet.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: January 7, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-hyeong Lee, Hoon-joo Na, Sung-in Suh, Min-woo Song, Byoung-hoon Lee, Hu-yong Lee, Sang-jin Hyun
  • Patent number: 10361428
    Abstract: An anode active material including a porous silicon having pores with a uniform average pore diameter, wherein the average pore diameter of the pores is in a range of about 50 nm to about 80 nm, a method of preparing the anode active material, and a lithium secondary battery including an anode including the anode active material.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: July 23, 2019
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Young-Ugk Kim, Seung-Uk Kwon, Jae-Hyuk Kim, Chang-Ui Jeong, Soon-Sung Suh, Hee-Young Chu, Duk-Hyoung Yoon
  • Patent number: 10340358
    Abstract: A semiconductor device and method for fabricating the same are provided. The semiconductor device includes a substrate, a first active pattern disposed on the substrate and spaced apart from the substrate, a gate insulating film which surrounds the first active pattern, a first work function adjustment film which surrounds the gate insulating film and includes carbon, and a first barrier film which surrounds the first work function adjustment film, in which a carbon concentration of the first work function adjustment film increases as it goes away from the first barrier film.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: July 2, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung In Suh, Hoon Joo Na, Min Woo Song, Byoung Hoon Lee, Chan Hyeong Lee, Hu Yong Lee, Sang Jin Hyun
  • Publication number: 20190140066
    Abstract: Provided are an integrated circuit device and a method of manufacturing the same. The integrated circuit device includes: a semiconductor substrate; a device isolation layer defining an active region of the semiconductor substrate; a gate insulating layer on the active region; a gate stack on the gate insulating layer; a spacer on a sidewall of the gate stack; and an impurity region provided on both sides of the gate stack, wherein the gate stack includes a metal carbide layer and a metal layer on the metal carbide layer, wherein the metal carbide layer includes a layer having a carbon content of about 0.01 at % to about 15 at %.
    Type: Application
    Filed: November 2, 2018
    Publication date: May 9, 2019
    Inventors: Byoung-Hoon Lee, HOON-JOO NA, SUNG-IN SUH, MIN-WOO SONG, CHAN-HYEONG LEE, HU-YONG LEE, SANG-JIN HYUN
  • Publication number: 20190081151
    Abstract: A semiconductor device includes an active region in a substrate, at least one nano-sheet on the substrate and spaced apart from a top surface of the active region, a gate above or below the nano-sheet, a gate insulating layer between the at least one nano-sheet and the gate, and source/drain regions on the active region at both sides of the at least one nano-sheet. The at least one nano-sheet includes a channel region; a gate disposed above or below the nano-sheet and including a single metal layer having different compositions of metal atoms of a surface and an inside thereof; a gate insulating layer between the nano-sheet and the gate; and source/drain regions disposed in the active region of both sides of the at least one nano-sheet.
    Type: Application
    Filed: March 8, 2018
    Publication date: March 14, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chan-hyeong LEE, Hoon-joo NA, Sung-in SUH, Min-woo SONG, Byoung-hoon LEE, Hu-yong LEE, Sang-jin HYUN
  • Publication number: 20190081152
    Abstract: A semiconductor device and method for fabricating the same are provided. The semiconductor device includes a substrate, a first active pattern disposed on the substrate and spaced apart from the substrate, a gate insulating film which surrounds the first active pattern, a first work function adjustment film which surrounds the gate insulating film and includes carbon, and a first barrier film which surrounds the first work function adjustment film, in which a carbon concentration of the first work function adjustment film increases as it goes away from. the first barrier film.
    Type: Application
    Filed: April 12, 2018
    Publication date: March 14, 2019
    Inventors: Sung In Suh, Hoon Joo Na, Min Woo Song, Byoung Hoon Lee, Chan Hyeong Lee, Hu Yong Lee, Sang Jin Hyun
  • Publication number: 20180261677
    Abstract: A semiconductor device includes a gate insulating layer disposed on a substrate, a first work function tuning layer disposed on the gate insulating layer, a lower barrier conductive layer on and in contact with the first work function tuning layer, and an upper barrier conductive layer on and in contact with the lower barrier conductive layer. The upper barrier conductive layer and the lower barrier conductive layer include a material in common, e.g., they may each include a titanium nitride (TiN) layer.
    Type: Application
    Filed: July 19, 2017
    Publication date: September 13, 2018
    Inventors: Byoung Hoon LEE, Hyeon Jin KIM, Hoon Joo NA, Sung In SUH, Chan Hyeong LEE, Hu Yong LEE, Seong Hoon JEONG, Sang Jin HYUN
  • Patent number: 10074855
    Abstract: An electrode for a lithium secondary battery including a silicon-based alloy having an expansion coefficient of 10% or greater and an electrochemically inactive whisker, and a lithium secondary battery using the electrode for a lithium secondary battery.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: September 11, 2018
    Assignees: Samsung SDI Co., Ltd., SNU R&DB Foundation
    Inventors: Jae-Hyuk Kim, Young-Ugk Kim, Seung-Uk Kwon, Soon-Sung Suh, Hee-Young Chu, Duk-Hyoung Yoon, Chang-Ui Jeong, Yo-Han Park, Kyu-Hwan Oh, Seoung-Bum Son, Seul-Cham Kim, Chan-Soon Kang
  • Patent number: 9716264
    Abstract: An electrode for a lithium secondary battery includes a silicon-based alloy, and has a surface roughness of about 1 to about 10 ?m and a surface roughness deviation of 5 ?m or less. A method of manufacturing the electrode includes mixing an electrode composition, milling the composition, coating the milled composition on a current collector, and drying the milled composition. A lithium secondary battery includes the electrode.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: July 25, 2017
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Soon-Sung Suh, Sung-Hwan Moon, Yury Matulevich, Seung-Uk Kwon, Yo-Han Park, Chang-Ui Jeong, Jae-Hyuk Kim, Chun-Gyoo Lee, Jong-Seo Choi
  • Patent number: 9634325
    Abstract: A negative active material, a negative electrode, a lithium battery including the negative active material, and a method of manufacturing the negative active material, the negative electrode, and the lithium battery. The negative active material includes a silicon-based alloy including Si, Ti, Ni, and Fe components. The silicon-based alloy includes a Ti2Ni phase as an inactive phase and active silicon having a lower content than that of typical silicon-based alloys. The negative active material may improve discharge capacity and lifetime characteristics of lithium batteries.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: April 25, 2017
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Seung-Uk Kwon, Jae-Hyuk Kim, Soon-Sung Suh, Hee-Young Chu, Chang-Ui Jeong, Yo-Han Park, Yury Matulevich, Chun-Gyoo Lee
  • Patent number: 9406937
    Abstract: A binder composition for a rechargeable lithium battery includes a semi-interpenetrating polymer network (semi-IPN) including a copolymer including a repeating unit represented by the following Chemical Formula 1 and a repeating unit represented by the following Chemical Formula 2 and polyacrylamide, and polyalkylene glycol. In Chemical Formula 1, R1 and R2 are the same or different and are independently selected from hydrogen, or a substituted or unsubstituted C1 to C10 alkyl group, and R3 and R4 are an alkali metal. In Chemical Formula 2, R5 to R8 are the same or different, and are independently hydrogen, a substituted or unsubstituted C1 to C30 alkyl group, a substituted or unsubstituted C6 to C30 aryl group, or a substituted or unsubstituted C1 to C30 alkoxy group.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: August 2, 2016
    Assignee: AEKYUNG CHEMICAL CO., LTD.
    Inventors: Byung-Joo Chung, Eon-Mi Lee, Seung-Uk Kwon, Jae-Hyuk Kim, Soon-Sung Suh, Chang-Ui Jeong, Ha-Na Yoo, Nam-Seon Kim, Yang-Soo Kim, Kwang-Sik Choi