Patents by Inventor Sung-Jae Oh

Sung-Jae Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103076
    Abstract: A deep learning-based MLCC stacked alignment inspection system includes an integrated defect detection unit configured to detect core areas requiring inspection of image data in which a stacked structure is photographed from a semiconductor MLCC chip by using at least one deep learning-based core area detection model, perform segmentation in the detected core areas, determine whether a defect exists according to a standard margin percentage range, and enable defect detection by generating normal and/or defective data based on the determination result, a result analysis unit configured to perform visualization for respective results of the core area detection, segmentation, and defect detection of the integrated defect detection unit, and provide stepwise analysis data for the visualized respective results so as to determine whether to modify corresponding data, and a data storage configured to store the normal and/or defective data, and stepwise analysis data.
    Type: Application
    Filed: November 1, 2022
    Publication date: March 28, 2024
    Inventors: Heung-Seon OH, Sung Bin SON, Jun Uk JUNG, Hyun Jae KIM
  • Publication number: 20240081286
    Abstract: Disclosed is a data collection apparatus for sea creatures including a main body, an antenna, a battery case and a separation unit. The main body includes a sensor assembly configured to collect information about surroundings of a target creature to be recorded, and a battery coupler formed at one side of the main body. The antenna protrudes in one direction from the main body so as to send data to outside. The battery case has a male connector configured such that at least a part thereof is accommodated in the battery coupler so as to be rotatably coupled thereto, and a battery installed in the battery case so as to supply electrical energy to the main body. The separation unit is detachably coupled to the battery case, and is fixed to the target creature to be recorded.
    Type: Application
    Filed: October 28, 2022
    Publication date: March 14, 2024
    Inventors: Seung Jae Baek, Sung Yong Oh, Yong Jae Kim
  • Publication number: 20240066984
    Abstract: An electric vehicle and a cruise control method therefore are capable of improving ride comfort by reducing a pitch caused by a road surface deceleration factor. A method of controlling a smart cruise control function includes determining a target speed of a vehicle that is traveling when a road surface deceleration factor in front of the vehicle is detected, entering the road surface deceleration factor while traveling at a constant speed corresponding to the determined target speed, and performing pitch reduction control upon entering the road surface deceleration factor.
    Type: Application
    Filed: January 19, 2023
    Publication date: February 29, 2024
    Inventors: Sung Jae Oh, Hui Un Son, Seok Min Jeong, Jin Kyeom Cho
  • Publication number: 20230223365
    Abstract: A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.
    Type: Application
    Filed: December 12, 2022
    Publication date: July 13, 2023
    Inventors: Jong Sik Paek, Won Chul Do, Doo Hyun Park, Eun Ho Park, Sung Jae Oh
  • Patent number: 11673568
    Abstract: A method for providing engine start information for a hybrid electric vehicle includes determining a likelihood of engine start for each of a plurality of reasons for engine start, and displaying a reason for engine start having a highest likelihood of engine start from among the plurality of reasons for engine start and engine start information including the highest likelihood of engine start in consideration of a type of at least one reason for engine start and a level of the likelihood of engine start.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: June 13, 2023
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Sung Bae Jeon, Jae Ho Lee, Song Il Park, Sung Jae Oh, Hui Un Son, Min Gyu Heo, Jin Kyeom Cho
  • Publication number: 20230056209
    Abstract: Disclosed is a vehicle strut insulator that includes first and second bushes (100 and 200) having different hardness characteristics. The first bush (100) having a relatively high hardness is disposed in a left-right direction of a vehicle that affects the handling performance, and the second bush (200) having a relatively low hardness is disposed in a forward-backward direction of the vehicle that affects the ride comfort. Accordingly, the vehicle strut insulator can satisfy both requirements for handling performance, ride comfort and road noise performance.
    Type: Application
    Filed: July 19, 2022
    Publication date: February 23, 2023
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION
    Inventors: Sung Jae Oh, Sang Hoon Yoo
  • Patent number: 11584355
    Abstract: Disclosed is a method of controlling a hybrid electric vehicle having a transmission, an engine, and first and second drive motors. The method includes: performing charging through the first drive motor using the power of the engine by engaging an engine clutch disposed between the engine and the first drive motor while a vehicle is stopped with the gear stage shifted to the parking (P) range; turning off the engine and controlling the clutch of the transmission to enter an open state when the gear stage is shifted to the driving (D) range; and commencing movement of the vehicle using the second drive motor alone or using at least one of the first drive motor or the engine together with the second drive motor based on at least one of requested torque, available torque of the second drive motor, or the speed of the first drive motor.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: February 21, 2023
    Assignees: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATION
    Inventors: Jin Kyeom Cho, Hui Un Son, Gyu Ri Lee, Sung Bae Jeon, Sung Jae Oh, Myung Woo Kim, Yeon Bok Kim, Yeong Jin Cho
  • Publication number: 20230002217
    Abstract: In one example, an electronic device can comprise (a) a first substrate comprising a first encapsulant extending from the first substrate bottom side to the first substrate top side, and a first substrate interconnect extending from the substrate bottom side to the substrate top side and coated by the first encapsulant, (b) a first electronic component embedded in the first substrate and comprising a first component sidewall coated by the first encapsulant, (c) a second electronic component coupled to the first substrate top side, (d) a first internal interconnect coupling the second electronic component to the first substrate interconnect, and (e) a cover structure on the first substrate and covering the second component sidewall and the first internal interconnect. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: July 12, 2022
    Publication date: January 5, 2023
    Inventor: Sung Jae Oh
  • Patent number: 11527496
    Abstract: A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: December 13, 2022
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Jong Sik Paek, Won Chul Do, Doo Hyun Park, Eun Ho Park, Sung Jae Oh
  • Patent number: 11383970
    Abstract: In one example, an electronic device can comprise (a) a first substrate comprising a first encapsulant extending from the first substrate bottom side to the first substrate top side, and a first substrate interconnect extending from the substrate bottom side to the substrate top side and coated by the first encapsulant, (b) a first electronic component embedded in the first substrate and comprising a first component sidewall coated by the first encapsulant, (c) a second electronic component coupled to the first substrate top side, (d) a first internal interconnect coupling the second electronic component to the first substrate interconnect, and (e) a cover structure on the first substrate and covering the second component sidewall and the first internal interconnect. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: July 12, 2022
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventor: Sung Jae Oh
  • Publication number: 20220009476
    Abstract: Disclosed is a method of controlling a hybrid electric vehicle having a transmission, an engine, and first and second drive motors. The method includes: performing charging through the first drive motor using the power of the engine by engaging an engine clutch disposed between the engine and the first drive motor while a vehicle is stopped with the gear stage shifted to the parking (P) range; turning off the engine and controlling the clutch of the transmission to enter an open state when the gear stage is shifted to the driving (D) range; and commencing movement of the vehicle using the second drive motor alone or using at least one of the first drive motor or the engine together with the second drive motor based on at least one of requested torque, available torque of the second drive motor, or the speed of the first drive motor.
    Type: Application
    Filed: December 4, 2020
    Publication date: January 13, 2022
    Applicants: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATION
    Inventors: Jin Kyeom CHO, Hui Un SON, Gyu Ri LEE, Sung Bae JEON, Sung Jae OH, Myung Woo KIM, Yeon Bok KIM, Yeong Jin CHO
  • Publication number: 20210179129
    Abstract: A method for providing engine start information for a hybrid electric vehicle includes determining a likelihood of engine start for each of a plurality of reasons for engine start, and displaying a reason for engine start having a highest likelihood of engine start from among the plurality of reasons for engine start and engine start information including the highest likelihood of engine start in consideration of a type of at least one reason for engine start and a level of the likelihood of engine start.
    Type: Application
    Filed: November 9, 2020
    Publication date: June 17, 2021
    Inventors: Sung Bae Jeon, Jae Ho Lee, Song Il Park, Sung Jae Oh, Hui Un Son, Min Gyu Heo, Jin Kyeom Cho
  • Publication number: 20210020591
    Abstract: A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.
    Type: Application
    Filed: June 2, 2020
    Publication date: January 21, 2021
    Inventors: Jong Sik Paek, Won Chul Do, Doo Hyun Park, Eun Ho Park, Sung Jae Oh
  • Publication number: 20210009406
    Abstract: In one example, an electronic device can comprise (a) a first substrate comprising a first encapsulant extending from the first substrate bottom side to the first substrate top side, and a first substrate interconnect extending from the substrate bottom side to the substrate top side and coated by the first encapsulant, (b) a first electronic component embedded in the first substrate and comprising a first component sidewall coated by the first encapsulant, (c) a second electronic component coupled to the first substrate top side, (d) a first internal interconnect coupling the second electronic component to the first substrate interconnect, and (e) a cover structure on the first substrate and covering the second component sidewall and the first internal interconnect. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: July 9, 2019
    Publication date: January 14, 2021
    Inventor: Sung Jae Oh
  • Patent number: 10679952
    Abstract: A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.
    Type: Grant
    Filed: February 10, 2017
    Date of Patent: June 9, 2020
    Assignee: Amkor Technology, Inc.
    Inventors: Jong Sik Paek, Won Chul Do, Doo Hyun Park, Eun Ho Park, Sung Jae Oh
  • Patent number: 9728514
    Abstract: A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: August 8, 2017
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Jong Sik Paek, Won Chul Do, Doo Hyun Park, Eun Ho Park, Sung Jae Oh
  • Publication number: 20170154861
    Abstract: A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.
    Type: Application
    Filed: February 10, 2017
    Publication date: June 1, 2017
    Inventors: Jong Sik Paek, Won Chul Do, Doo Hyun Park, Eun Ho Park, Sung Jae Oh
  • Patent number: 9667204
    Abstract: A power amplification apparatus includes a multiple output bias voltage generation unit, a dynamic bias modulator, and a power amplifier. The multiple output bias voltage generation unit generates first and second bias voltages using an inductor coupled between an input voltage and a plurality of capacitors. The capacitors are connected to the inductor in a non-overlapping manner. The dynamic bias modulator outputs the first bias voltage or the second bias voltage as a variable bias voltage based on results of comparing voltage of an envelope signal of a radio frequency (RF) signal to an envelope reference voltage. The power amplifier is biased in response to the variable bias voltage, amplifies power of the RF signal, and outputs the amplified RF signal to an antenna.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: May 30, 2017
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Youngoo Yang, Jong Seok Bae, Sung Jae Oh, Soo Ho Cho
  • Publication number: 20170040955
    Abstract: A power amplification apparatus includes a multiple output bias voltage generation unit, a dynamic bias modulator, and a power amplifier. The multiple output bias voltage generation unit generates first and second bias voltages using an inductor coupled between an input voltage and a plurality of capacitors. The capacitors are connected to the inductor in a non-overlapping manner. The dynamic bias modulator outputs the first bias voltage or the second bias voltage as a variable bias voltage based on results of comparing voltage of an envelope signal of a radio frequency (RF) signal to an envelope reference voltage. The power amplifier is biased in response to the variable bias voltage, amplifies power of the RF signal, and outputs the amplified RF signal to an antenna.
    Type: Application
    Filed: May 3, 2016
    Publication date: February 9, 2017
    Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Youngoo YANG, Jong Seok BAE, Sung Jae OH, Soo Ho CHO
  • Publication number: 20160322317
    Abstract: A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.
    Type: Application
    Filed: July 11, 2016
    Publication date: November 3, 2016
    Inventors: Jong Sik Paek, Won Chul Do, Doo Hyun Park, Eun Ho Park, Sung Jae Oh