Patents by Inventor Sung Ju YOO

Sung Ju YOO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11880274
    Abstract: A host device includes a Host Memory Buffer (HMB) including a plurality of memory areas, each memory area configured to store data provided from a storage device which is in communication with the host device, and a host controller configured to generate reliability information of each of the plurality of memory areas, and in communication with the storage device to provide the reliability information to the storage device.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: January 23, 2024
    Assignee: SK HYNIX INC.
    Inventors: Jeong Hyun Kim, Byong Woo Ryu, Ji Hun Choi, Sung Ju Yoo
  • Publication number: 20240020052
    Abstract: Embodiments of the present disclosure relate to a memory system and an operating method of the memory system. According to embodiments of the present disclosure, the memory system may receive a default enabled information from the host. The default enabled information indicates whether the host maintains a configuration of a host memory buffer in the host and target data stored in the host memory buffer when the memory system is in a low power mode state in which power supplied from the host is cut off.
    Type: Application
    Filed: September 27, 2023
    Publication date: January 18, 2024
    Inventors: Jeong Hyun KIM, Byong Woo RYU, Ji Hun CHOI, Son Hong MIN, Sung Ju YOO
  • Publication number: 20240004811
    Abstract: A storage device of the present disclosure includes a memory device configured to store a plurality of address maps indicating a mapping relationship between a logical address and a physical address, and a memory controller configured to, when the storage device is in a power on state from a power off state, determine a priority rank of each of the plurality of address maps based on file attribute information received from a host and sequentially load the plurality of address maps according to the priority rank.
    Type: Application
    Filed: February 8, 2023
    Publication date: January 4, 2024
    Inventors: Ji Hun CHOI, Jeong Hyun KIM, Min Su SON, Sung Ju Yoo
  • Patent number: 11803322
    Abstract: Embodiments of the present disclosure relate to a memory system and an operating method of the memory system. According to embodiments of the present disclosure, the memory system may receive a default enabled information from the host. The default enabled information indicates whether the host maintains a configuration of a host memory buffer in the host and target data stored in the host memory buffer when the memory system is in a low power mode state in which power supplied from the host is cut off.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: October 31, 2023
    Assignee: SK hynix Inc.
    Inventors: Jeong Hyun Kim, Byong Woo Ryu, Ji Hun Choi, Son Hong Min, Sung Ju Yoo
  • Publication number: 20230288971
    Abstract: A heat management circuit may include a throttling circuit configured to cool, for a predetermined time amount, at least one semiconductor functional circuit, which is designed to perform a predetermined function, when a plurality of first temperature signals respectively transmitted from a plurality of temperature sensors installed in the semiconductor functional circuit satisfy a throttling condition; and an analysis unit configured to receive, after lapse of the predetermined time amount, a plurality of second temperature signals from the respective temperature sensors, determine whether the cooling is successful or fails, and detect a temperature sensor having outputted a second temperature signal of abnormal value when the cooling is determined to fail.
    Type: Application
    Filed: October 3, 2022
    Publication date: September 14, 2023
    Inventors: Jeong Hyun KIM, Sung Ju YOO, Ji Hun CHOI
  • Publication number: 20230176772
    Abstract: A memory controller includes a buffer, a prefetch controller, and a boot controller. The buffer stores workload information including a history of an expected I/O request expected to be received from a host during booting operation. The prefetch controller is configured to, before a target I/O request is received from the host after start of booting, read expected data corresponding to the expected I/O request from memory devices based on workload information, and store the expected data in the buffer. The boot controller updates the workload information based on the target I/O request depending on whether target data corresponding to the target I/O request is included in the expected data, and stores updated workload information in an area in which data is readable with a minimum number of accesses from a plurality of the memory devices.
    Type: Application
    Filed: May 24, 2022
    Publication date: June 8, 2023
    Inventors: Ji Hun CHOI, Jeong Hyun KIM, Sung Ju YOO
  • Publication number: 20230074941
    Abstract: A host device can improve the reliability of data stored in a Host Memory Buffer (HMB). The host device includes a HMB including a plurality of memory areas, each memory area configured to store data provided from a storage device which is in communication with the host device, and a host controller configured to generate reliability information of each of the plurality of memory areas, and in communication with the storage device to provide the reliability information to the storage device.
    Type: Application
    Filed: March 14, 2022
    Publication date: March 9, 2023
    Inventors: Jeong Hyun KIM, Byong Woo RYU, Ji Hun CHOI, Sung Ju YOO
  • Publication number: 20220350529
    Abstract: Embodiments of the present disclosure relate to a memory system and an operating method of the memory system. According to embodiments of the present disclosure, the memory system may receive a default enabled information from the host. The default enabled information indicates whether the host maintains a configuration of a host memory buffer in the host and target data stored in the host memory buffer when the memory system is in a low power mode state in which power supplied from the host is cut off.
    Type: Application
    Filed: January 13, 2022
    Publication date: November 3, 2022
    Inventors: Jeong Hyun KIM, Byong Woo RYU, Ji Hun CHOI, Son Hong MIN, Sung Ju YOO