Abstract: A semiconductor structure and method of manufacturing a semiconductor structure are provided. The semiconductor structure includes a substrate and at least one contact plug. The substrate has an epi-layer. The contact plug is formed on the epi-layer and includes a silicide cap disposed on the epi-layer; a conductive pillar disposed on the silicide cap such that the conductive pillar electrically connects to the epi-layer via the silicide cap; and a hybrid liner. The hybrid liner surrounds the conductive pillar and includes a lower portion abutting the silicide cap and having a nitride material and an upper portion abutting the conductive pillar and having an oxidized nitride material. Due to the hybrid liner, a semiconductor structure with increased capacitance and decreased resistivity can be obtained.

Abstract: A semiconductor device and a method of making the same are provided. A method according to the present disclosure includes forming a first type epitaxial layer over a second type source/drain feature of a second type transistor, forming a second type epitaxial layer over a first type source/drain feature of a first type transistor, selectively depositing a first metal over the first type epitaxial layer to form a first metal layer while the first metal is substantially not deposited over the second type epitaxial layer over the first type source/drain feature, and depositing a second metal over the first metal layer and the second type epitaxial layer to form a second metal layer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes multiple semiconductor nanostructures, and the semiconductor nanostructures include a first semiconductor material. The semiconductor device structure also includes multiple epitaxial structures extending from edges of the semiconductor nanostructures. The epitaxial structures include a second semiconductor material that is different than the first semiconductor material. The semiconductor device structure further includes a gate stack wrapped around the semiconductor nanostructures.

Abstract: A semiconductor device includes first and second semiconductor fins extending from a substrate, and first and second epitaxial layers wrapping around the first and second semiconductor fins, respectively. The semiconductor device further includes a contact plug over the first epitaxial layer and the second epitaxial layer. The contact plug includes a first interfacial layer over the first epitaxial layer and a second interfacial layer over the second epitaxial layer. The first and second interfacial layers include a noble metal element and a Group IV element.

Abstract: The present disclosure describes a semiconductor device with a nitrided capping layer and methods for forming the same. One method includes forming a first conductive structure in a first dielectric layer on a substrate, depositing a second dielectric layer on the first conductive structure and the first dielectric layer, and forming an opening in the second dielectric layer to expose the first conductive structure and a portion of the first dielectric layer. The method further includes forming a nitrided layer on a top portion of the first conductive structure, a top portion of the portion of the first dielectric layer, sidewalls of the opening, and a top portion of the second dielectric layer, and forming a second conductive structure in the opening, where the second conductive structure is in contact with the nitrided layer.

Abstract: A titanium precursor is used to selectively form a titanium silicide (TiSix) layer in a semiconductor device. A plasma-based deposition operation is performed in which the titanium precursor is provided into an opening, and a reactant gas and a plasma are used to cause silicon to diffuse to a top surface of a transistor structure. The diffusion of silicon results in the formation of a silicon-rich surface of the transistor structure, which increases the selectivity of the titanium silicide formation relative to other materials of the semiconductor device. The titanium precursor reacts with the silicon-rich surface to form the titanium silicide layer. The selective titanium silicide layer formation results in the formation of a titanium silicon nitride (TiSixNy) on the sidewalls in the opening, which enables a conductive structure such as a metal source/drain contact to be formed in the opening without the addition of another barrier layer.

Abstract: Method to form low-contact-resistance contacts to source/drain features are provided. A method of the present disclosure includes receiving a workpiece including an opening that exposes a surface of an n-type source/drain feature and a surface of a p-type source/drain feature, selectively depositing a first silicide layer on the surface of the p-type source/drain feature while the surface of the n-type source/drain feature is substantially free of the first silicide layer, depositing a metal layer on the first silicide layer and the surface of the n-type source/drain feature, and depositing a second silicide layer over the metal layer. The selectively depositing includes passivating the surface of the surface of the n-type source/drain features with a self-assembly layer, selectively depositing the first silicide layer on the surface of the p-type source/drain feature, and removing the self-assembly layer.

Abstract: An integrated circuit (IC) with conductive structures and a method of fabricating the IC are disclosed. The method includes depositing a first dielectric layer on a semiconductor device, forming a conductive structure in the first dielectric layer, removing a portion of the first dielectric layer to expose a sidewall of the conductive structure, forming a barrier structure surrounding the sidewall of the conductive structure, depositing a conductive layer on the barrier structure, and performing a polishing process on the barrier structure and the conductive layer.

Abstract: A method includes forming a first transistor over a substrate, in which the first transistor includes first source/drain epitaxy structures; forming a second transistor over the first transistor, in which the second transistor includes second source/drain epitaxy structures; forming an opening extending through one of the second source/drain epitaxy structures and exposing a top surface of one of the first source/drain epitaxy structures; performing a first deposition process to form a first metal in the opening, in which a first void is formed in the first metal during the first deposition process; performing a first etching back process to the first metal until the first void is absent; and performing a second deposition process to form a second metal in the opening and over the first metal.

Abstract: A semiconductor device that has two transistors and a source/drain contact. The first transistor has a layer of semiconductor material that acts as a channel, a structure that serves as a gate and wraps around the semiconductor channel layer, and two epitaxy structures on either end of the semiconductor channel layer that function as the source and drain. The second transistor is situated above the first transistor and has similar components, including a semiconductor channel layer, gate structure, and source/drain epitaxy structures. The connection between the first and second source/drain epitaxy structures is made by a source/drain contact that passes through one of the second source/drain epitaxy structures. This contact is made up of a metal plug and a metal liner that lines the plug.

Abstract: A titanium precursor is used to selectively form a titanium silicide (TiSix) layer in a semiconductor device. A plasma-based deposition operation is performed in which the titanium precursor is provided into an opening, and a reactant gas and a plasma are used to cause silicon to diffuse to a top surface of a transistor structure. The diffusion of silicon results in the formation of a silicon-rich surface of the transistor structure, which increases the selectivity of the titanium silicide formation relative to other materials of the semiconductor device. The titanium precursor reacts with the silicon-rich surface to form the titanium silicide layer. The selective titanium silicide layer formation results in the formation of a titanium silicon nitride (TiSixNy) on the sidewalls in the opening, which enables a conductive structure such as a metal source/drain contact to be formed in the opening without the addition of another barrier layer.

Abstract: A semiconductor device includes a semiconductor fin protruding from a substrate. The semiconductor device includes a P-type device over the semiconductor fin and an N-type device over the semiconductor fin. The P-type device includes a first source/drain (S/D) feature adjacent a first gate structure. The P-type device includes a dipole layer over the first S/D feature, where the dipole layer includes a first metal and a second metal different from the first metal. The P-type device further includes a first silicide layer over the dipole layer, where the first silicide layer includes the first metal. The N-type device includes a second S/D feature adjacent a second gate structure. The N-type device further includes a second silicide layer directly contacting the second S/D feature, where the second silicide layer includes the first metal, and where a composition of the second silicide layer is different from that of the dipole layer.

Abstract: Low-resistance contacts improve performance of integrated circuit devices that feature epitaxial source/drain regions. The low resistance contacts can be used with transistors of various types, including planar field effect transistors (FETs), FinFETs, and gate-all-around (GAA) FETs. Low-resistance junctions are formed by removing an upper portion of the source/drain region and replacing it with an epitaxially-grown boron-doped silicon germanium (SiGe) material. Material resistivity can be tuned by varying the temperature during the epitaxy process. Electrical contact is then made at the low-resistance junctions.

Abstract: The present disclosure describes a method to form a semiconductor device with backside contact structures. The method includes forming a semiconductor device on a first side of a substrate. The semiconductor device includes a source/drain (S/D) region. The method further includes etching a portion of the S/D region on a second side of the substrate to form an opening and forming an epitaxial contact structure on the S/D region in the opening. The second side is opposite to the first side. The epitaxial contact structure includes a first portion in contact with the S/D region in the opening and a second portion on the first portion. A width of the second portion is larger than the first portion.

Abstract: In an embodiment, a device includes: a first insulating fin; a second insulating fin; a nanostructure between the first insulating fin and the second insulating fin; and a gate structure wrapping around the nanostructure, a top surface of the gate structure disposed above a top surface of the first insulating fin, the top surface of the gate structure disposed below a top surface of the second insulating fin.

Abstract: A device includes a substrate, a gate structure wrapping around a vertical stack of nanostructure semiconductor channels, and a source/drain abutting the vertical stack and in contact with the nanostructure semiconductor channels. The device includes a gate via in contact with the first gate structure. The gate via includes a metal liner layer having a first flowability, and a metal fill layer having a second flowability higher than the first flowability.

Abstract: A method includes forming a device region over a substrate; forming a first dielectric layer over the device region; forming an opening in the first dielectric layer; conformally depositing a first conductive material along sidewalls and bottom surfaces of the opening; depositing a second conductive material on the first conductive material to fill the opening, wherein the second conductive material is different from the first conductive material; and performing a first thermal process to form an interface region extending from a first region of the first conductive material to a second region of the second conductive material, wherein the interface region includes a homogeneous mixture of the first conductive material and the second conductive material.

Abstract: A semiconductor device structure and methods of forming the same are described. In some embodiments, the structure includes an N-type source/drain epitaxial feature disposed over a substrate, a P-type source/drain epitaxial feature disposed over the substrate, a first silicide layer disposed directly on the N-type source/drain epitaxial feature, and a second silicide layer disposed directly on the P-type source/drain epitaxial feature. The first and second silicide layers include a first metal, and the second silicide layer is substantially thicker than the first silicide layer. The structure further includes a third silicide layer disposed directly on the first silicide layer and a fourth silicide layer disposed directly on the second silicide layer. The third and fourth silicide layer include a second metal different from the first metal, and the third silicide layer is substantially thicker than the fourth silicide layer.

Abstract: A semiconductor structure includes a substrate, a first silicide, and a second silicide. The substrate has a first epitaxy region in a first transistor of a first conductive type and a second epitaxy region in a second transistor of a second conductive type. The first silicide is on the first epitaxy region, the first silicide comprising a first metal and a second metal, and the second silicide is on the second epitaxy region. A work function of the first silicide is greater than a work function of the second silicide.

Abstract: The present disclosure describes a method to form a semiconductor device with backside contact structures. The method includes forming a semiconductor device on a first side of a substrate. The semiconductor device includes a source/drain (S/D) region. The method further includes etching a portion of the S/D region on a second side of the substrate to form an opening and forming an epitaxial contact structure on the S/D region in the opening. The second side is opposite to the first side. The epitaxial contact structure includes a first portion in contact with the S/D region in the opening and a second portion on the first portion. A width of the second portion is larger than the first portion.