Abstract: A method of programming a non-volatile memory device including a first memory block and a second memory block includes: performing a first program operation on a first memory cell in the first memory block and connected to a first word line of a first level with respect to a substrate; after the performing of the first program operation on the first memory cell, performing the first program operation on a second memory cell in the second memory block and connected to a second word line of the first level; and after the performing of the first program operation on the second memory cell, performing a second program operation on the first memory cell.

Abstract: A method of operating a memory device includes performing a first program operation on memory cells connected to a first word line among a plurality of word lines, performing the first program operation on memory cells connected to a second word line among the plurality of word lines, applying a turn-on voltage at a first level to the first and second word lines, applying a voltage at a level lower than the first level to a third word line among the plurality of word lines, performing a precharge operation on partial cell strings among a plurality of cell strings, and performing a second program operation on the memory cells connected to the first word line.

Abstract: A method of operating a nonvolatile memory device includes: performing a first program operation by applying a first program voltage to a selected word line connected to a selected memory cell; performing a first verify operation by applying a verify voltage to the selected word line and applying a first word line voltage to at least one unselected word line; performing a second program operation by applying a second program voltage to the selected word line; and performing a second verify operation by applying a verify voltage to the selected word line and applying a second word line voltage to the at least one unselected word line, wherein at least one of the first word line voltage and the second word line voltage has a lower voltage level than a read voltage applied in a read operation of the nonvolatile memory device.

Abstract: A method of programming a non-volatile memory device including a first memory block and a second memory block includes: performing a first program operation on a first memory cell in the first memory block and connected to a first word line of a first level with respect to a substrate; after the performing of the first program operation on the first memory cell, performing the first program operation on a second memory cell in the second memory block and connected to a second word line of the first level; and after the performing off the first program operation on the second memory cell, performing a second program operation on the first memory cell.

Abstract: A reading method for a cell string using multiple pass voltages includes a pre-charging step and a reading step to read a selected word line cell WL[k]. The pre-charging step comprises applying a positive pass voltage (Vpass1) to the selected word line (WL[k]), the upper word lines (Upper WL) of the selected word line (WL[k]), at least one the lower word lines adjacent to the selected word line (WL[k]); and applying a negative pass voltage (Vpass2) to the remaining lower word lines (Lower WL) except for WL[k?1]. The reading step comprises applying sequentially a first voltage which is lower than a read voltage (Vverify) and the read voltage (Vverify) to the selected word line WL[k], applying a second voltage to a common source line CSL and the unselected word lines and sensing a current or a voltage of the selected word line WL[k], thereby reading information stored in the selected word line WL[k].

Abstract: Provided are a cell string and a reading method for the cell string. The cell string includes a semiconductor body formed on a surface of an insulating layer, first and second semiconductor regions formed at respective ends of the semiconductor body and are formed by being doped with different types of impurities, two or more control electrodes which are separated from each other to be electrically isolated, and a gate insulating film stack which is formed between the semiconductor body and the control electrodes, wherein the semiconductor body is configured to include at least two layers, and adjacent layers of the semiconductor body have different energy band gaps, wherein the semiconductor body is formed by an intrinsic semiconductor or a semiconductor being doped with impurities, and wherein the first and second semiconductor regions are doped with impurities of which concentration is higher than that of the semiconductor body.

Abstract: A reading method for a cell string includes a pre-charging step and a reading step to read a selected word line cell WL[k]. The pre-charging step comprises applying a positive pass voltage (Vpass1) to the selected word line (WL[k]), the upper word lines (Upper WL) of the selected word line (WL[k]), at least one the lower word lines adjacent to the selected word line (WL[k]); and applying a negative pass voltage (Vpass2) to the remaining lower word lines (Lower WL) except for WL[k?1]. The reading step comprises applying sequentially a first voltage which is lower than a read voltage (Vverify) and the read voltage (Vverify) to the selected word line WL[k], applying a second voltage to a common source line CSL and the unselected word lines and sensing a current or a voltage of the selected word line WL[k], thereby reading information stored in the selected word line WL[k].

Abstract: Provided are a cell string and a reading method for the cell string. The cell string includes a semiconductor body formed on a surface of an insulating layer, first and second semiconductor regions formed at respective ends of the semiconductor body and are formed by being doped with different types of impurities, two or more control electrodes which are separated from each other to be electrically isolated, and a gate insulating film stack which is formed between the semiconductor body and the control electrodes, wherein the semiconductor body is configured to include at least two layers, and adjacent layers of the semiconductor body have different energy band gaps, wherein the semiconductor body is formed by an intrinsic semiconductor or a semiconductor being doped with impurities, and wherein the first and second semiconductor regions are doped with impurities of which concentration is higher than that of the semiconductor body.