Patents by Inventor Sung-min Seo

Sung-min Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250173279
    Abstract: A system includes a peripheral circuit comprising at least one I/O (input and output) device; a memory device configured to store digital information including at least one set of control programs, each set comprising a plurality of sequences; and a processor in communication with the peripheral circuit and the memory device and configured to control at least one of the peripheral circuit or the memory device by processing a control program according to a processing order of sequences of the control program. The processor is in communication with an external device and configured to change the processing order of the sequences in response to receiving of a request from the external device.
    Type: Application
    Filed: May 17, 2024
    Publication date: May 29, 2025
    Inventors: Sung Min SEO, Woon Yong JO, Kyung Lan HEO
  • Publication number: 20240067805
    Abstract: The present invention provides an improved method of quantitative and/or qualitative analysis of a target molecule using nitrocellulose membrane (NCM). In particular, the present invention provides a porous nitrocellulose membrane that includes a surface and an organic nanostructured molecule that is non-covalently attached to the surface of NCM. The organic nanostructured molecule has a branched region that includes a plurality of terminal region (e.g., terminal end) moieties that are non-covalently attached or bound to a surface of the porous NCM. The organic nanostructured molecule also comprises a linear region that includes a covalently attached capture molecule that is adapted to selectively bind to a target molecule. The NCM of the invention provides an improved reproducibility, reliability, and selectivity compared an NCM in the absence of the organic nanostructured molecule.
    Type: Application
    Filed: October 24, 2023
    Publication date: February 29, 2024
    Applicant: NB Postech
    Inventors: Joon Won PARK, Sung Min SEO
  • Patent number: 11795304
    Abstract: The present invention provides an improved method of quantitative and/or qualitative analysis of a target molecule using nitrocellulose membrane (NCM). In particular, the present invention provides a porous nitrocellulose membrane that includes a surface and an organic nanostructured molecule that is non-covalently attached to the surface of NCM. The organic nanostructured molecule has a branched region that includes a plurality of terminal region (e.g., terminal end) moieties that are non-covalently attached or bound to a surface of the porous NCM. The organic nanostructured molecule also comprises a linear region that includes a covalently attached capture molecule that is adapted to selectively bind to a target molecule. The NCM of the invention provides an improved reproducibility, reliability, and selectivity compared an NCM in the absence of the organic nanostructured molecule.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: October 24, 2023
    Assignee: NB Postech
    Inventors: Joon Won Park, Sung Min Seo
  • Publication number: 20210230399
    Abstract: The present invention provides an improved method of quantitative and/or qualitative analysis of a target molecule using nitrocellulose membrane (NCM). In particular, the present invention provides a porous nitrocellulose membrane that includes a surface and an organic nanostructured molecule that is non-covalently attached to the surface of NCM. The organic nanostructured molecule has a branched region that includes a plurality of terminal region (e.g., terminal end) moieties that are non-covalently attached or bound to a surface of the porous NCM. The organic nanostructured molecule also comprises a linear region that includes a covalently attached capture molecule that is adapted to selectively bind to a target molecule. The NCM of the invention provides an improved reproducibility, reliability, and selectivity compared an NCM in the absence of the organic nanostructured molecule.
    Type: Application
    Filed: November 1, 2018
    Publication date: July 29, 2021
    Applicant: NB Postech
    Inventors: Joon Won PARK, Sung Min SEO
  • Patent number: 9983202
    Abstract: Disclosed is a method of synthesizing a polymeric fluorescent tracer for signal amplification, including (a) subjecting a streptavidin-fluorophore conjugate (SA-FL) and a spacer-attached biotin-conjugated antibody (b-Ab) to reaction at least two times; (b) treating a dual biotin oligomer spacer (db-oN); and (c) performing a homogenization process.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: May 29, 2018
    Assignee: Korea University Research and Business Foundation
    Inventors: Se-Hwan Paek, Sung-Min Seo
  • Patent number: 9858981
    Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: January 2, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yun-Young Lee, Kyo-Min Sohn, Sang-Joon Hwang, Sung-Min Seo, Sang-Bo Lee, Nak-Won Heo
  • Publication number: 20170276671
    Abstract: The present invention provides a regenerated cellulose membrane (RCM) that is useful in analysis of a sample for the presence of or the amount of a target molecule present in the sample. The invention also provides a method for producing and using the same. The RCM of the invention has a plurality of RCM functional groups on its surface in which a linker is covalently attached. The linker has a distal end and a proximal end, where the proximal end comprises at least one RCM linking functional group such that the RCM linking functional group is attached to the RCM functional group. The distal end of the linker comprises a receptor linking functional group that is used to covalently attach a receptor molecule. The receptor molecule is adapted for binding to a target molecule of interest when the target molecule is present in the sample. The RCM of the invention can be used for quantitative and/or qualitative analysis of a target molecule within the sample.
    Type: Application
    Filed: November 14, 2016
    Publication date: September 28, 2017
    Applicant: NB Postech, Inc.
    Inventors: Joon Won PARK, Sung Min SEO, Jong Myung KO
  • Publication number: 20170092349
    Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.
    Type: Application
    Filed: December 8, 2016
    Publication date: March 30, 2017
    Inventors: Yun-Young Lee, Kyo-Min SOHN, Sang-Joon HWANG, Sung-Min SEO, Sang-Bo LEE, Nak-Won HEO
  • Patent number: 9551038
    Abstract: Provided are a system for integrated analysis of a real-time polymerase chain reaction and a DNA chip and a method for integrated analysis using the same, and more particularly to an apparatus for integrated analysis of a real-time polymerase chain reaction and a DNA chip and a method for integrated analysis using the same. According to the method for integrated analysis of a biomaterial of the present invention, gene amplification proceeds and subsequently hybridization proceeds in a single reactor, thereby preventing contamination of the sample due to external factors, which may be caused while the sample is transferred for reaction, and automating a series of procedures such as injection of the sample, reaction of the biomaterial, and detection and analysis of results.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: January 24, 2017
    Assignee: K-MAC
    Inventors: Sung-Min Seo, Do-Bu Lee, Joong Hwan Lee, Mun-Cheol Paek, Su-Jin Ku
  • Patent number: 9524770
    Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: December 20, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yun-Young Lee, Kyo-Min Sohn, Sang-Joon Hwang, Sung-Min Seo, Sang-Bo Lee, Nak-Won Heo
  • Publication number: 20160247553
    Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.
    Type: Application
    Filed: April 29, 2016
    Publication date: August 25, 2016
    Inventors: Yun-Young LEE, Kyo-Min SOHN, Sang-Joon HWANG, Sung-Min SEO, Sang-Bo LEE, Nak-Won HEO
  • Patent number: 9343175
    Abstract: A fuse data reading circuit is configured to read fuse data in multi-reading modes. The fuse data may be stored in a fuse array that includes a plurality of fuse cells configured to store fuse data. The fuse data reading circuit may include a sensing unit configured to sense the fuse data stored in the fuse cells of the fuse array, and a controller configured to control an operation of reading the fuse data stored in the fuse cells. The controller sets different sensing conditions for sensing the fuse data according to an operation period during the fuse data reading operation to read the fuse data. Methods include operations and use of the fuse data reading circuit.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 17, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Gil-Su Kim, Jong-Min Oh, Sung-Min Seo, Je-Min Ryu, Seong-Jin Jang
  • Patent number: 9336906
    Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: May 10, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yun-Young Lee, Kyo-Min Sohn, Sang-Joon Hwang, Sung-Min Seo, Sang-Bo Lee, Nak-Won Heo
  • Patent number: 9293218
    Abstract: Provided is a semiconductor memory device. The semiconductor includes a One Time Programmable (OTP) cell array, a converging circuit and a sense amplifier circuit. The OTP cell array includes a plurality of OTP cells connected to a plurality of bit lines, each bit line extending in a first direction. The converging includes a common node contacting a first bit line and a second bit line. The sense amplifier circuit includes a sense amplifier connected to the common node, the sense amplifier configured to amplify a signal of the common node.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: March 22, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Min Yu, Sung-Min Seo, Ho-Young Song, Gil-Su Kim, Jong-Min Oh
  • Patent number: 9214244
    Abstract: A method for reading data stored in a fuse device included in a memory device including a memory cell array is provided. The method comprises reading trimming data of the fuse device, wherein the trimming data is related to trimming a level of voltage or a level of current used for an operation of the memory device; and after the reading the trimming data, reading defective cell address data of the fuse device, wherein the defective cell address data is related to defective cells in the memory cell array.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: December 15, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Gil Su Kim, Jong Min Oh, Sung Min Seo, Seong Jin Jang
  • Patent number: 9165673
    Abstract: A semiconductor memory device includes a memory cell array configured to store data including a verification code; a sensing unit configured to sense the stored data including the verification code; and a verification unit configured to determine whether the sensing unit is able to sense the stored data based on a sensing condition, wherein the verification unit is configured to determine whether the sensing unit is able to sense the stored data based on the sensing condition and a value of the verification code sensed by the sensing unit.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: October 20, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Min Yu, Ho-Young Song, Sung-Min Seo, Sang-Joon Hwang
  • Patent number: 9123407
    Abstract: A data read start decision device includes: a storing circuit configured to store code key data; a read check circuit configured to output a read start signal in response to code key data read from the storing circuit, and a controller configured to start reading environment setting data from the storing circuit in response to the read start signal. The read check circuit is configured to at least one of: receive the read start signal from the controller and transfer the read start signal to the controller in response to the read code key data; and generate the read start signal based on the read code key data and output the read start signal to the controller.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: September 1, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Min Ryu, Sung-Min Seo, Ju-Seop Park
  • Publication number: 20150221361
    Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.
    Type: Application
    Filed: October 1, 2014
    Publication date: August 6, 2015
    Inventors: Yun-Young Lee, Kyo-Min Sohn, Sang-Joon Hwang, Sung-Min Seo, Sang-Bo Lee, Nak-Won Heo
  • Patent number: 8897055
    Abstract: A memory device includes a memory cell array and a fuse device. The fuse device includes a fuse cell array and a fuse control circuit. The fuse cell array includes a first fuse cell sub-array which stores first data associated with operation of the fuse control circuit, and a second fuse cell sub-array which stores second data associated with operation of the memory device. The fuse control circuit is electrically coupled to the first and second fuse cell sub-arrays, and is configured to read the first and second data from the first and second fuse cell sub-arrays, respectively.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: November 25, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Min Ryu, Gil-Su Kim, Jong-Min Oh, Sung-Min Seo, Ho-Young Song, Yong-Ho Cho
  • Patent number: 8871160
    Abstract: Provided is a biomaterial detecting device for confirming or detecting a biomaterial reaction, and more particularly to a biomaterial detecting device, which is formed in a stick type to thereby be immersed in a tube containing a biomaterial solution to be tested; has an upper portion with a cap structure to thereby induce reaction with a biomaterial, and thus facilitate confirmation and detection of the biomaterial; and is formed in a cap structure to thereby prevent evaporation of a sample and infiltration of an external material at the time of a biomaterial reaction in the tube, and thus improve reliability in analysis.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: October 28, 2014
    Assignee: K-MAC
    Inventors: Sung-Min Seo, Jae-Hyung Park, Oleksandrov Sergiy, Joong Hwan Lee, Mun-Cheol Paek, Su-Jin Ku