Abstract: Disclosed is a marine organism antifouling apparatus for ships using a UV-C module. The marine organism antifouling apparatus includes circular or polygonal net units and at least one UV-C module configured to be turned on to emit ultraviolet light by power supplied thereto, the UV-C module being provided at each of the net units, wherein the net units are connected to each other in horizontal and vertical directions to constitute a net member, and ultraviolet light is emitted from the UV-C module to prevent attachment of marine organisms in the state in which an underwater exposure zone of a ship that is moored is surrounded by the net member.

Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.

Abstract: Disclosed is a composite for forming a coacervate interfacial film. The composite for forming the coacervate interfacial film contains a cationic hectorite nanoplate-shaped particle structure containing a hectorite nanoplate-shaped particle and a cationic surfactant coupled to a surface of the hectorite nanoplate-shaped particle, and an anionic cellulose nanofibril containing an anionic functional group in at least a portion thereof, in which the composite may form the coacervate interfacial film at an interface of an oil phase and a water phase through electrostatic interaction between the cationic surfactant and the anionic functional group.

Abstract: The present invention provides an improved method of quantitative and/or qualitative analysis of a target molecule using nitrocellulose membrane (NCM). In particular, the present invention provides a porous nitrocellulose membrane that includes a surface and an organic nanostructured molecule that is non-covalently attached to the surface of NCM. The organic nanostructured molecule has a branched region that includes a plurality of terminal region (e.g., terminal end) moieties that are non-covalently attached or bound to a surface of the porous NCM. The organic nanostructured molecule also comprises a linear region that includes a covalently attached capture molecule that is adapted to selectively bind to a target molecule. The NCM of the invention provides an improved reproducibility, reliability, and selectivity compared an NCM in the absence of the organic nanostructured molecule.

Abstract: The present invention provides an improved method of quantitative and/or qualitative analysis of a target molecule using nitrocellulose membrane (NCM). In particular, the present invention provides a porous nitrocellulose membrane that includes a surface and an organic nanostructured molecule that is non-covalently attached to the surface of NCM. The organic nanostructured molecule has a branched region that includes a plurality of terminal region (e.g., terminal end) moieties that are non-covalently attached or bound to a surface of the porous NCM. The organic nanostructured molecule also comprises a linear region that includes a covalently attached capture molecule that is adapted to selectively bind to a target molecule. The NCM of the invention provides an improved reproducibility, reliability, and selectivity compared an NCM in the absence of the organic nanostructured molecule.

Abstract: The present invention provides an improved method of quantitative and/or qualitative analysis of a target molecule using nitrocellulose membrane (NCM). In particular, the present invention provides a porous nitrocellulose membrane that includes a surface and an organic nanostructured molecule that is non-covalently attached to the surface of NCM. The organic nanostructured molecule has a branched region that includes a plurality of terminal region (e.g., terminal end) moieties that are non-covalently attached or bound to a surface of the porous NCM. The organic nanostructured molecule also comprises a linear region that includes a covalently attached capture molecule that is adapted to selectively bind to a target molecule. The NCM of the invention provides an improved reproducibility, reliability, and selectivity compared an NCM in the absence of the organic nanostructured molecule.

Abstract: Disclosed is a method of synthesizing a polymeric fluorescent tracer for signal amplification, including (a) subjecting a streptavidin-fluorophore conjugate (SA-FL) and a spacer-attached biotin-conjugated antibody (b-Ab) to reaction at least two times; (b) treating a dual biotin oligomer spacer (db-oN); and (c) performing a homogenization process.

Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.

Abstract: The present invention provides a regenerated cellulose membrane (RCM) that is useful in analysis of a sample for the presence of or the amount of a target molecule present in the sample. The invention also provides a method for producing and using the same. The RCM of the invention has a plurality of RCM functional groups on its surface in which a linker is covalently attached. The linker has a distal end and a proximal end, where the proximal end comprises at least one RCM linking functional group such that the RCM linking functional group is attached to the RCM functional group. The distal end of the linker comprises a receptor linking functional group that is used to covalently attach a receptor molecule. The receptor molecule is adapted for binding to a target molecule of interest when the target molecule is present in the sample. The RCM of the invention can be used for quantitative and/or qualitative analysis of a target molecule within the sample.

Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.

Abstract: Provided are a system for integrated analysis of a real-time polymerase chain reaction and a DNA chip and a method for integrated analysis using the same, and more particularly to an apparatus for integrated analysis of a real-time polymerase chain reaction and a DNA chip and a method for integrated analysis using the same. According to the method for integrated analysis of a biomaterial of the present invention, gene amplification proceeds and subsequently hybridization proceeds in a single reactor, thereby preventing contamination of the sample due to external factors, which may be caused while the sample is transferred for reaction, and automating a series of procedures such as injection of the sample, reaction of the biomaterial, and detection and analysis of results.

Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.

Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.

Abstract: A fuse data reading circuit is configured to read fuse data in multi-reading modes. The fuse data may be stored in a fuse array that includes a plurality of fuse cells configured to store fuse data. The fuse data reading circuit may include a sensing unit configured to sense the fuse data stored in the fuse cells of the fuse array, and a controller configured to control an operation of reading the fuse data stored in the fuse cells. The controller sets different sensing conditions for sensing the fuse data according to an operation period during the fuse data reading operation to read the fuse data. Methods include operations and use of the fuse data reading circuit.

Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.

Abstract: Provided is a semiconductor memory device. The semiconductor includes a One Time Programmable (OTP) cell array, a converging circuit and a sense amplifier circuit. The OTP cell array includes a plurality of OTP cells connected to a plurality of bit lines, each bit line extending in a first direction. The converging includes a common node contacting a first bit line and a second bit line. The sense amplifier circuit includes a sense amplifier connected to the common node, the sense amplifier configured to amplify a signal of the common node.

Abstract: A method for reading data stored in a fuse device included in a memory device including a memory cell array is provided. The method comprises reading trimming data of the fuse device, wherein the trimming data is related to trimming a level of voltage or a level of current used for an operation of the memory device; and after the reading the trimming data, reading defective cell address data of the fuse device, wherein the defective cell address data is related to defective cells in the memory cell array.

Abstract: A semiconductor memory device includes a memory cell array configured to store data including a verification code; a sensing unit configured to sense the stored data including the verification code; and a verification unit configured to determine whether the sensing unit is able to sense the stored data based on a sensing condition, wherein the verification unit is configured to determine whether the sensing unit is able to sense the stored data based on the sensing condition and a value of the verification code sensed by the sensing unit.

Abstract: A data read start decision device includes: a storing circuit configured to store code key data; a read check circuit configured to output a read start signal in response to code key data read from the storing circuit, and a controller configured to start reading environment setting data from the storing circuit in response to the read start signal. The read check circuit is configured to at least one of: receive the read start signal from the controller and transfer the read start signal to the controller in response to the read code key data; and generate the read start signal based on the read code key data and output the read start signal to the controller.

Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.