Patents by Inventor Sungmin Song

Sungmin Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240138213
    Abstract: A display apparatus includes: a first column including blue pixels and red pixels alternately located along a first direction; a second column located in a second direction crossing the first direction from the first column, and including green pixels located along the first direction; a third column located in the second direction from the second column, and including red pixels and blue pixels alternately located along the first direction; a fourth column located in the second direction from the third column, and including green pixels located along the first direction; a first test data line extending in the second direction; a second test data line extending in the second direction; a third test data line extending in the second direction; and a fourth test data line extending in the second direction.
    Type: Application
    Filed: April 30, 2023
    Publication date: April 25, 2024
    Inventors: Jaejin Song, Sungmin Son
  • Patent number: 10083903
    Abstract: A method of manufacture of an integrated packaging system includes: providing a substrate; mounting an integrated circuit on the substrate; mounting an interposer substrate having an interposer pad on the integrated circuit; covering an encapsulant over the integrated circuit and the interposer substrate; forming a hole through the encapsulant aligned over the interposer pad; and placing a conductive connector on and in direct contact with the interposer pad.
    Type: Grant
    Filed: July 4, 2016
    Date of Patent: September 25, 2018
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: In Sang Yoon, DeokKyung Yang, Sungmin Song
  • Patent number: 9385066
    Abstract: A method of manufacture of an integrated packaging system includes: providing a substrate; mounting an integrated circuit on the substrate; mounting an interposer substrate having an interposer pad on the integrated circuit; covering an encapsulant over the integrated circuit and the interposer substrate; forming a hole through the encapsulant aligned over the interposer pad; and placing a conductive connector on and in direct contact with the interposer pad.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: July 5, 2016
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: In Sang Yoon, DeokKyung Yang, Sungmin Song
  • Patent number: 9355962
    Abstract: A method of manufacture of an integrated circuit package stacking system including: forming a base frame includes: providing a support panel, and forming a coupling pad, a mounting pad, a base frame trace, a discrete component pad, or a combination thereof on the support panel; fabricating a package substrate; coupling an integrated circuit die to the package substrate; mounting the base frame over the integrated circuit die and the package substrate; and removing the support panel from the base frame.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: May 31, 2016
    Assignee: STATS ChipPAC Ltd.
    Inventors: SeongMin Lee, Sungmin Song, Jong-Woo Ha
  • Patent number: 9330945
    Abstract: An integrated circuit package system with multi-chip module is provided including: providing an upper substrate having an upper chip thereon; positioning a lower chip under the upper chip, the lower chip having bottom interconnects thereon; encapsulating the upper chip and the lower chip with a chip encapsulant on the upper substrate with the bottom interconnects exposed; mounting the lower chip over a lower substrate with a gap between the chip encapsulant and the lower substrate; and filling the gap with a package encapsulant or chip attach adhesive.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: May 3, 2016
    Assignee: STATS ChipPAC Ltd.
    Inventors: Sungmin Song, SeungYun Ahn, JoHyun Bae, Jong-Woo Ha
  • Patent number: 9234038
    Abstract: Disclosed herein are methods of diagnosing, preventing and treating Alzheimer's disease based on the use of an inhibitor for the binding of amyloid-? (A?) to Fc?RIIb, and a method of screening the inhibitor. The inhibitor is selected from the group consisting of an Fc?RIIb protein or a variant thereof, an Fc?RIIb extracellular domain, an anti-Fc?RIIb antibody, an Fc?RIIb-specific peptide and an Fc?RIIb-specific siRNA. The inhibitor reduces the toxic signaling and intracellular translocation of A? and the neurotoxicity, neuronal cell death and memory impairment mediated by A? by inhibiting the binding between A? and Fc?RIIb. Thus, the inhibitor is useful in the diagnosis, prevention and treatment of Alzheimer's disease.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: January 12, 2016
    Assignee: Seoul National University Industry Foundation
    Inventors: Yong-Keun Jung, Sungmin Song
  • Patent number: 8779562
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a bottom substrate; attaching a first integrated circuit die to the bottom substrate; forming an interposer including: forming an intermediate substrate; forming a shield on the intermediate substrate; and applying a wire-in-film adhesive to the shield; and attaching the interposer to the first integrated circuit die with the wire-in-film adhesive.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: July 15, 2014
    Assignee: STATS ChipPAC Ltd.
    Inventors: SeongMin Lee, Sungmin Song, SeongHun Mun
  • Patent number: 8772916
    Abstract: An integrated circuit package system that includes: a support structure including an electrical contact; a solder mask over the support structure, the solder mask including a solder mask flange, the solder mask flange directly on a support structure first surface; an integrated circuit over the support structure; and encapsulant over the integrated circuit and in contact with the solder mask flange. A mold system that includes a first mold having a projection along a first mold bottom surface, the projection between a first cavity and a recess.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: July 8, 2014
    Assignee: Stats Chippac Ltd.
    Inventors: Ki Youn Jang, Sungmin Song, JoHyun Bae
  • Patent number: 8765525
    Abstract: A method of manufacture of an integrated packaging system includes: providing a substrate; mounting an integrated circuit on the substrate; mounting an interposer substrate having an interposer pad on the integrated circuit; covering an encapsulant over the integrated circuit and the interposer substrate; forming a hole through the encapsulant aligned over the interposer pad; and placing a conductive connector on and in direct contact with the interposer pad.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: July 1, 2014
    Assignee: STATS ChipPAC Ltd.
    Inventors: In Sang Yoon, DeokKyung Yang, Sungmin Song
  • Patent number: 8618653
    Abstract: An integrated circuit package system includes: providing a singulated, layered structure equivalent in size to an integrated circuit die and having an adhesive layer, an electrical insulator layer, and a heat slug; attaching the integrated circuit die to a base; attaching bond wires to a top of the base for electrical connection between the integrated circuit die and the base; attaching the singulated, layered structure to the integrated circuit die wherein the bond wires are surrounded by the adhesive layer; and encapsulating the integrated circuit die and a portion of the heat slug with a molding compound.
    Type: Grant
    Filed: January 30, 2008
    Date of Patent: December 31, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: WonJun Ko, Taeg Ki Lim, Sungmin Song
  • Patent number: 8569882
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; mounting a central integrated circuit over the base substrate; mounting a side package having a side package substrate along a peripheral region of the base substrate and laterally peripheral to the central integrated circuit with the side package substrate coplanar with the central integrated circuit; and encapsulating the central integrated circuit and the side package above the base substrate with a base encapsulation to form a planar surface over the central integrated circuit and the side package facing away from the base substrate.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: October 29, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: WonJun Ko, Sungmin Song, Jong Wook Ju, JaEun Yun, Hye Ran Lee
  • Patent number: 8501535
    Abstract: A method for manufacturing an integrated circuit package system includes: connecting an integrated circuit die with a bottom connection structure; placing an adhesive encapsulation over the integrated circuit die and the bottom connection structure with the bottom connection structure exposed; and placing a top connection structure over the adhesive encapsulation at an opposing side to the bottom connection structure.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: August 6, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: Sungmin Song, SeungYun Ahn, JoHyun Bae
  • Publication number: 20120319265
    Abstract: A method of manufacture of an integrated packaging system includes: providing a substrate; mounting an integrated circuit on the substrate; mounting an interposer substrate having an interposer pad on the integrated circuit; covering an encapsulant over the integrated circuit and the interposer substrate; forming a hole through the encapsulant aligned over the interposer pad; and placing a conductive connector on and in direct contact with the interposer pad.
    Type: Application
    Filed: June 16, 2011
    Publication date: December 20, 2012
    Inventors: In Sang Yoon, DeokKyung Yang, Sungmin Song
  • Publication number: 20120267801
    Abstract: An integrated circuit package system that includes: a support structure including an electrical contact; a solder mask over the support structure, the solder mask including a solder mask flange, the solder mask flange directly on a support structure first surface; an integrated circuit over the support structure; and encapsulant over the integrated circuit and in contact with the solder mask flange. A mold system that includes a first mold having a projection along a first mold bottom surface, the projection between a first cavity and a recess.
    Type: Application
    Filed: June 28, 2012
    Publication date: October 25, 2012
    Inventors: Ki Youn Jang, Sungmin Song, JoHyun Bae
  • Publication number: 20120241980
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; mounting a central integrated circuit over the base substrate; mounting a side package having a side package substrate along a peripheral region of the base substrate and laterally peripheral to the central integrated circuit with the side package substrate coplanar with the central integrated circuit; and encapsulating the central integrated circuit and the side package above the base substrate with a base encapsulation to form a planar surface over the central integrated circuit and the side package facing away from the base substrate.
    Type: Application
    Filed: March 24, 2011
    Publication date: September 27, 2012
    Inventors: WonJun Ko, Sungmin Song, Jong Wook Ju, JaEun Yun, Hye Ran Lee
  • Publication number: 20120241921
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a bottom substrate; attaching a first integrated circuit die to the bottom substrate; forming an interposer including: forming an intermediate substrate; forming a shield on the intermediate substrate; and applying a wire-in-film adhesive to the shield; and attaching the interposer to the first integrated circuit die with the wire-in-film adhesive.
    Type: Application
    Filed: March 24, 2011
    Publication date: September 27, 2012
    Inventors: SeongMin Lee, Sungmin Song, SeongHun Mun
  • Patent number: 8252615
    Abstract: An integrated circuit package system that includes: providing a support structure including an integrated circuit and an electrical contact adjacent thereto; providing a first mold having a first cavity with a projection and a recess for collecting flash; engaging the first mold on the support structure with the first cavity over at least a portion of the integrated circuit and the projection and the recess between the at least a portion of the integrated circuit and the electrical contact; and injecting encapsulation material into the first cavity.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: August 28, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Ki Youn Jang, Sungmin Song, JoHyun Bae
  • Patent number: 8227925
    Abstract: An integrated circuit packaging system comprising: a base package substrate; a first integrated circuit die attached over the base package substrate; and an interposer having a recessed edge and a corner that extends to a singulation edge, the interposer mounted over the first integrated circuit die, the interposer having a recess gap between the recessed edge and the singulation edge.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: July 24, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Sungmin Song, SeongMin Lee, WonJun Ko
  • Publication number: 20120146243
    Abstract: An integrated circuit packaging system comprising: a base package substrate; a first integrated circuit die attached over the base package substrate; and an interposer having a recessed edge and a corner that extends to a singulation edge, the interposer mounted over the first integrated circuit die, the interposer having a recess gap between the recessed edge and the singulation edge.
    Type: Application
    Filed: February 15, 2012
    Publication date: June 14, 2012
    Inventors: Sungmin Song, SeongMin Lee, WonJun Ko
  • Publication number: 20120114669
    Abstract: Disclosed herein are methods of diagnosing, preventing and treating Alzheimer's disease based on the use of an inhibitor for the binding of amyloid-? (A?) to Fc?RIIb, and a method of screening the inhibitor. The inhibitor is selected from the group consisting of an Fc?RIIb protein or a variant thereof, an Fc?RIIb extracellular domain, an anti-Fc?RIIb antibody, an Fc?RIIb-specific peptide and an Fc?RIIb-specific siRNA. The inhibitor reduces the toxic signaling and intracellular translocation of A? and the neurotoxicity, neuronal cell death and memory impairment mediated by A? by inhibiting the binding between A? and Fc?RIIb. Thus, the inhibitor is useful in the diagnosis, prevention and treatment of Alzheimer's disease.
    Type: Application
    Filed: January 19, 2012
    Publication date: May 10, 2012
    Inventors: Yong-Keun Jung, Sungmin Song