Patents by Inventor Sung Moon LEE
Sung Moon LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11970493Abstract: The present disclosure provides autotaxin (ATX) inhibitor compounds and compositions including said compounds. The present disclosure also provides methods of using said compounds and compositions for inhibiting ATX. Also provided are methods of preparing said compounds and compositions, and synthetic precursors of said compounds.Type: GrantFiled: October 4, 2021Date of Patent: April 30, 2024Assignee: ILDONG PHARMACEUTICAL CO., LTD.Inventors: Sung-Ku Choi, Yoon-Suk Lee, Sung-Wook Kwon, Kyung-Sun Kim, Jeong-Geun Kim, Jeong-Ah Kim, An-Na Moon, Sun-Young Park, Jun-Su Ban, Dong-Keun Song, Kyu-Sic Jang, Ju-Young Jung, Soo-Jin Lee
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Publication number: 20240082345Abstract: Provided is a peptide composition for preventing or treating Alzheimer's dementia. A peptide or a salt substituent thereof according to the presently claimed subject matter exhibits effects such as suppression of LPS-mediated cytokine production, suppression of LPS-induced neuroinflammation, amelioration of cognitive impairment, suppression of beta amyloid or tau protein aggregation, and suppression of neuronal loss. The polypeptide or the salt substituent thereof can permeate the blood-brain barrier, and thus, is expected to be usefully used for preventing or treating Alzheimer's dementia.Type: ApplicationFiled: August 25, 2021Publication date: March 14, 2024Applicant: HLB SCIENCE INC.Inventors: Yeong Min PARK, Wahn Soo CHOI, Seung-Hyun LEE, In Duk JUNG, Yong Joo KIM, Seung Jun LEE, Sung Min KIM, Mi Suk LEE, Hee Jo PARK, Seung Pyo CHOI, Minho MOON, Soo Jung SHIN, Sujin KIM, Yong Ho PARK, Jae-Yong PARK, Kun Ho LEE
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Patent number: 11915874Abstract: A multilayer capacitor includes a body including a dielectric layer and a plurality of internal electrodes stacked on each other with the dielectric layer interposed therebetween; and external electrodes disposed externally on the body, and respectively including a first layer connected to the internal electrode and a second layer covering the first layer, wherein the first layer includes a metal particle including an element A, an oxide of an element Z, formed on the metal particle, and an A-Z intermetallic compound phase, and here, the element Z has a higher ionization tendency than the element A.Type: GrantFiled: April 19, 2022Date of Patent: February 27, 2024Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Sang Moon Lee, Taek Jung Lee, Sung Ho Lee, Seol Gyeong Park
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Publication number: 20230403839Abstract: A semiconductor device comprises a first gate structure extending in a first direction and including a first gate electrode and a first gate capping pattern, a second gate structure spaced apart from the first gate structure and extending in the first direction, and including a second gate electrode and a second gate capping pattern, an active pattern extending in a second direction, the active pattern below the second gate structure, an epitaxial pattern on one side of the second gate structure and on the active pattern, a gate contact connected to the first gate electrode, and a node contact connected to the second gate electrode and to the epitaxial pattern. An upper surface of the gate contact is at a same level as the first gate capping pattern, and an upper surface of the node contact is lower than the upper surface of the first gate capping pattern.Type: ApplicationFiled: August 25, 2023Publication date: December 14, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Sung Hun JUNG, Heon Jong SHIN, Min Chan GWAK, Sung Moon LEE, Jeong Ki HWANG
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Publication number: 20230402382Abstract: A semiconductor device includes: a base substrate; a first interlayer insulating layer disposed on the base substrate; a power rail disposed inside the first interlayer insulating layer; an active pattern extended in a first horizontal direction and disposed on the first interlayer insulating layer; a gate electrode extended in a second horizontal direction different from the first horizontal direction and disposed on the active pattern; a gate cut extended in the first horizontal direction and disposed on the power rail, wherein the gate cut separates the gate electrode; and a power rail via disposed inside the gate cut, wherein the power rail via is overlapped by the power rail.Type: ApplicationFiled: February 24, 2023Publication date: December 14, 2023Inventors: Jin Kyu KIM, Yun Suk NAM, Kyoung Woo LEE, Ho-Jun KIM, Da Rong OH, Sung Moon LEE, Hag Ju CHO, Seung Min CHA
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Publication number: 20230378174Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.Type: ApplicationFiled: August 3, 2023Publication date: November 23, 2023Inventors: Sang Min YOO, Ju Youn KIM, Hyung Joo NA, Bong Seok SUH, Joo Ho JUNG, Eui Chul HWANG, Sung Moon LEE
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Patent number: 11784186Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.Type: GrantFiled: August 3, 2021Date of Patent: October 10, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sang Min Yoo, Ju Youn Kim, Hyung Joo Na, Bong Seok Suh, Joo Ho Jung, Eui Chui Hwang, Sung Moon Lee
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Patent number: 11778801Abstract: A semiconductor device comprises a first gate structure extending in a first direction and including a first gate electrode and a first gate capping pattern, a second gate structure spaced apart from the first gate structure and extending in the first direction, and including a second gate electrode and a second gate capping pattern, an active pattern extending in a second direction, the active pattern below the second gate structure, an epitaxial pattern on one side of the second gate structure and on the active pattern, a gate contact connected to the first gate electrode, and a node contact connected to the second gate electrode and to the epitaxial pattern. An upper surface of the gate contact is at a same level as the first gate capping pattern, and an upper surface of the node contact is lower than the upper surface of the first gate capping pattern.Type: GrantFiled: February 25, 2021Date of Patent: October 3, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Hun Jung, Heon Jong Shin, Min Chan Gwak, Sung Moon Lee, Jeong Ki Hwang
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Patent number: 11538807Abstract: A semiconductor device and a method for fabricating the same, the device including an active pattern extending in a first direction on a substrate; a field insulating film surrounding a part of the active pattern; a first gate structure extending in a second direction on the active pattern and the field insulating film, a second gate structure spaced apart from the first gate structure and extending in the second direction on the active pattern and the field insulating film; and a first device isolation film between the first and second gate structure, wherein a side wall of the first gate structure facing the first device isolation film includes an inclined surface having an acute angle with respect to an upper surface of the active pattern, and a lowermost surface of the first device isolation film is lower than or substantially coplanar with an uppermost surface of the field insulating film.Type: GrantFiled: May 12, 2021Date of Patent: December 27, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Eui Chul Hwang, Ju Youn Kim, Hyung Joo Na, Bong Seok Suh, Sang Min Yoo, Joo Ho Jung, Sung Moon Lee
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Publication number: 20220020753Abstract: A semiconductor device comprises a first gate structure extending in a first direction and including a first gate electrode and a first gate capping pattern, a second gate structure spaced apart from the first gate structure and extending in the first direction, and including a second gate electrode and a second gate capping pattern, an active pattern extending in a second direction, the active pattern below the second gate structure, an epitaxial pattern on one side of the second gate structure and on the active pattern, a gate contact connected to the first gate electrode, and a node contact connected to the second gate electrode and to the epitaxial pattern. An upper surface of the gate contact is at a same level as the first gate capping pattern, and an upper surface of the node contact is lower than the upper surface of the first gate capping pattern.Type: ApplicationFiled: February 25, 2021Publication date: January 20, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Sung Hun JUNG, Heon Jong SHIN, Min Chan GWAK, Sung Moon LEE, Jeong Ki HWANG
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Publication number: 20210366905Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.Type: ApplicationFiled: August 3, 2021Publication date: November 25, 2021Inventors: Sang Min YOO, Ju Youn KIM, Hyung Joo NA, Bong Seok SUH, Joo Ho JUNG, Eui Chul HWANG, Sung Moon LEE
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Publication number: 20210265351Abstract: A semiconductor device and a method for fabricating the same, the device including an active pattern extending in a first direction on a substrate; a field insulating film surrounding a part of the active pattern; a first gate structure extending in a second direction on the active pattern and the field insulating film, a second gate structure spaced apart from the first gate structure and extending in the second direction on the active pattern and the field insulating film; and a first device isolation film between the first and second gate structure, wherein a side wall of the first gate structure facing the first device isolation film includes an inclined surface having an acute angle with respect to an upper surface of the active pattern, and a lowermost surface of the first device isolation film is lower than or substantially coplanar with an uppermost surface of the field insulating film.Type: ApplicationFiled: May 12, 2021Publication date: August 26, 2021Inventors: Eui Chul Hwang, Ju Youn Kim, Hyung Joo Na, Bong Seok Suh, Sang Min Yoo, Joo Ho Jung, Sung Moon Lee
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Patent number: 11101269Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.Type: GrantFiled: September 18, 2020Date of Patent: August 24, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sang Min Yoo, Ju Youn Kim, Hyung Joo Na, Bong Seok Suh, Joo Ho Jung, Eui Chui Hwang, Sung Moon Lee
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Patent number: 11063150Abstract: A semiconductor device may include active fins each of which extends in a first direction on a substrate, the active fins being spaced apart from each other in a second direction different from the first direction, a conductive structure extending in the second direction on the substrate, the conductive structure contacting the active fins, a first diffusion break pattern between the substrate and the conductive structure, the first diffusion break pattern dividing a first active fin of the active fins into a plurality of pieces aligned in the first direction, and a second diffusion break pattern adjacent to the conductive structure on the substrate, the second diffusion break pattern having an upper surface higher than a lower surface of the conductive structure, and dividing a second active fin of the active fins into a plurality of pieces aligned in the first direction.Type: GrantFiled: May 15, 2019Date of Patent: July 13, 2021Assignee: SAMSUNG ELECTRONICS CO. LTD.Inventors: Sang-Min Yoo, Byung-Sung Kim, Ju-Youn Kim, Bong-Seok Suh, Hyung-Joo Na, Sung-Moon Lee, Joo-Ho Jung, Eui-Chul Hwang
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Patent number: 11011519Abstract: A semiconductor device and a method for fabricating the same, the device including an active pattern extending in a first direction on a substrate; a field insulating film surrounding a part of the active pattern; a first gate structure extending in a second direction on the active pattern and the field insulating film, a second gate structure spaced apart from the first gate structure and extending in the second direction on the active pattern and the field insulating film; and a first device isolation film between the first and second gate structure, wherein a side wall of the first gate structure facing the first device isolation film includes an inclined surface having an acute angle with respect to an upper surface of the active pattern, and a lowermost surface of the first device isolation film is lower than or substantially coplanar with an uppermost surface of the field insulating film.Type: GrantFiled: March 29, 2019Date of Patent: May 18, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Eui Chul Hwang, Ju Youn Kim, Hyung Joo Na, Bong Seok Suh, Sang Min Yoo, Joo Ho Jung, Sung Moon Lee
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Publication number: 20210005603Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.Type: ApplicationFiled: September 18, 2020Publication date: January 7, 2021Inventors: Sang Min YOO, Ju Youn KIM, Hyung Joo NA, Bong Seok SUH, Joo Ho JUNG, Eui Chul HWANG, Sung Moon LEE
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Patent number: 10804265Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.Type: GrantFiled: April 12, 2019Date of Patent: October 13, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sang Min Yoo, Ju Youn Kim, Hyung Joo Na, Bong Seok Suh, Joo Ho Jung, Eui Chul Hwang, Sung Moon Lee
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Patent number: 10636793Abstract: A FINFET includes a first fin extending in a first direction on a substrate and, a second fin extending in the first direction and spaced apart from the first fin in the first direction. A third fin is provided with a long side shorter than long sides of the first fin and the second fin and is disposed between the first fin and the second fin. A first gate structure extends in a second direction different from the first direction and crosses the first fin. A device isolation layer is disposed on a lower sidewall of each of the first, second and third fins and is formed to extend in the first direction. An electrically insulating diffusion break region includes a first portion crossing between the first fin and the third fin, a second portion crossing between the second fin and the third fin, and a third portion disposed between the first portion and the second portion on the third fin. The diffusion break region extends in the second direction on the device isolation layer.Type: GrantFiled: November 29, 2018Date of Patent: April 28, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Hyung Joo Na, Ju Youn Kim, Bong Seok Suh, Sang Min Yoo, Joo Ho Jung, Eui Chul Hwang, Sung Moon Lee
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Publication number: 20200105919Abstract: A semiconductor device may include active fins each of which extends in a first direction on a substrate, the active fins being spaced apart from each other in a second direction different from the first direction, a conductive structure extending in the second direction on the substrate, the conductive structure contacting the active fins, a first diffusion break pattern between the substrate and the conductive structure, the first diffusion break pattern dividing a first active fin of the active fins into a plurality of pieces aligned in the first direction, and a second diffusion break pattern adjacent to the conductive structure on the substrate, the second diffusion break pattern having an upper surface higher than a lower surface of the conductive structure, and dividing a second active fin of the active fins into a plurality of pieces aligned in the first direction.Type: ApplicationFiled: May 15, 2019Publication date: April 2, 2020Inventors: Sang-Min YOO, Byung-Sung KIM, Ju-Youn KIM, Bong-Seok SUH, Hyung-Joo NA, Sung-Moon LEE, Joo-Ho JUNG, Eui-Chul HWANG
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Publication number: 20200043920Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.Type: ApplicationFiled: April 12, 2019Publication date: February 6, 2020Inventors: Sang Min YOO, Ju Youn KIM, Hyung Joo NA, Bong Seok SUH, Joo Ho JUNG, Eui Chul HWANG, Sung Moon LEE