Patents by Inventor Sung-pil Jang

Sung-pil Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11108229
    Abstract: An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes a transient-state detection circuit configured to generate a dynamic triggering signal based on a voltage change rate of a voltage on a first power rail; a voltage detection circuit configured to generate a static triggering signal based on the voltage on the first power rail; a trigger circuit configured to generate a discharge control signal based on the dynamic triggering signal and the static triggering signal; and a main discharge circuit configured to discharge an electric charge from the first power rail to a second power rail based on the discharge control signal.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: August 31, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Pil Jang, Chang-Su Kim, Han-Gu Kim, Moon-Seok Yang, Kyoung-Ki Jeon
  • Publication number: 20190173278
    Abstract: An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes a transient-state detection circuit configured to generate a dynamic triggering signal based on a voltage change rate of a voltage on a first power rail; a voltage detection circuit configured to generate a static triggering signal based on the voltage on the first power rail; a trigger circuit configured to generate a discharge control signal based on the dynamic triggering signal and the static triggering signal; and a main discharge circuit configured to discharge an electric charge from the first power rail to a second power rail based on the discharge control signal.
    Type: Application
    Filed: July 18, 2018
    Publication date: June 6, 2019
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Pil JANG, Chang-Su KIM, Han-Gu KIM, Moon-Seok YANG, Kyoung-Ki JEON
  • Patent number: 7888739
    Abstract: An electrostatic discharge circuit between a first pad and a second pad including an electrostatic discharge circuit element, including a bipolar transistor path and a resistor path, the electrostatic discharge circuit element alternately discharging an electrostatic current through the bipolar transistor path and the resistor path.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: February 15, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-hee Jeon, Han-gu Kim, Sung-pil Jang
  • Patent number: 7763941
    Abstract: There is provided an integrated circuit device having an input/output electrostatic discharge (I/O ESD) protection cell. The integrated circuit device includes an I/O ESD protection cell comprising a VDD ESD protection element connected between an I/O pad and a VDD line, a ground voltage (VSS) ESD protection element connected between the I/O pad and a VSS line, and a power clamp element connected between the VDD line and the VSS line, and wherein the VDD ESD protection element, the power clamp element, and the VSS ESD protection element in the I/O ESD protection cell are adjacent to each other so they can be connected in a straight line or are arranged to partially overlap.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: July 27, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-gu Kim, Ki-tae Lee, Jae-hyok Ko, Woo-sub Kim, Sung-pil Jang
  • Patent number: 7417282
    Abstract: The present invention disclosed herein is a Vertical Double-Diffused Metal Oxide Semiconductor (VDMOS) device incorporating a reverse diode. This device includes a plurality of source regions isolated from a drain region. A source region in close proximity to the drain region is a first diffusion structure in which a heavily doped diffusion layer of a second conductivity type is formed in a body region of a second conductivity type. Another source region is a second diffusion structure in which a heavily doped diffusion layer of a first conductivity type and a heavily doped diffusion layer of the second conductivity type are formed in the body region of the second conductivity type. An impurity diffusion structure of the source region in close proximity to the drain region is changed to be operated as a diode, thereby forming a strong current path to ESD (Electro-Static Discharge) or EOS (Electrical Over Stress). As a result, it is possible to prevent the device from being broken down.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: August 26, 2008
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Sung-Pil Jang, Han-Gu Kim, Chan-Hee Jeon
  • Publication number: 20080042206
    Abstract: There is provided an integrated circuit device having an input/output electrostatic discharge (I/O ESD) protection cell. The integrated circuit device includes an I/O ESD protection cell comprising a VDD ESD protection element connected between an I/O pad and a VDD line, a ground voltage (VSS) ESD protection element connected between the I/O pad and a VSS line, and a power clamp element connected between the VDD line and the VSS line, and wherein the VDD ESD protection element, the power clamp element, and the VSS ESD protection element in the I/O ESD protection cell are adjacent to each other so they can be connected in a straight line or are arranged to partially overlap.
    Type: Application
    Filed: August 30, 2007
    Publication date: February 21, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Han-gu Kim, Ki-tae Lee, Jae-hyok Ko, Woo-sub Kim, Sung-Pil Jang
  • Patent number: 7280329
    Abstract: There is provided an integrated circuit device having an input/output electrostatic discharge (I/O ESD) protection cell. The integrated circuit device includes an I/O ESD protection cell comprising a VDD ESD protection element connected between an I/O pad and a VDD line, a ground voltage (VSS) ESD protection element connected between the I/O pad and a VSS line, and a power clamp element connected between the VDD line and the VSS line, and wherein the VDD ESD protection element, the power clamp element, and the VSS ESD protection element in the I/O ESD protection cell are adjacent to each other so they can be connected in a straight line or are arranged to partially overlap.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: October 9, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-gu Kim, Ki-tae Lee, Jae-hyok Ko, Woo-sub Kim, Sung-pil Jang
  • Publication number: 20060175663
    Abstract: An electrostatic discharge circuit between a first pad and a second pad including an electrostatic discharge circuit element, including a bipolar transistor path and a resistor path, the electrostatic discharge circuit element alternately discharging an electrostatic current through the bipolar transistor path and the resistor path.
    Type: Application
    Filed: August 11, 2005
    Publication date: August 10, 2006
    Inventors: Chan-hee Jeon, Han-gu Kim, Sung-pil Jang
  • Publication number: 20060124994
    Abstract: The present invention disclosed herein is a Vertical Double-Diffused Metal Oxide Semiconductor (VDMOS) device incorporating a reverse diode. This device includes a plurality of source regions isolated from a drain region. A source region in close proximity to the drain region is a first diffusion structure in which a heavily doped diffusion layer of a second conductivity type is formed in a body region of a second conductivity type. Another source region is a second diffusion structure in which a heavily doped diffusion layer of a first conductivity type and a heavily doped diffusion layer of the second conductivity type are formed in the body region of the second conductivity type. An impurity diffusion structure of the source region in close proximity to the drain region is changed to be operated as a diode, thereby forming a strong current path to ESD (Electro-Static Discharge) or EOS (Electrical Over Stress). As a result, it is possible to prevent the device from being broken down.
    Type: Application
    Filed: November 2, 2005
    Publication date: June 15, 2006
    Inventors: Sung-Pil Jang, Han-Gu Kim, Chan-Hee Jeon
  • Publication number: 20050045955
    Abstract: There is provided an integrated circuit device having an input/output electrostatic discharge (I/O ESD) protection cell. The integrated circuit device includes an I/O ESD protection cell comprising a VDD ESD protection element connected between an I/O pad and a VDD line, a ground voltage (VSS) ESD protection element connected between the I/O pad and a VSS line, and a power clamp element connected between the VDD line and the VSS line, and wherein the VDD ESD protection element, the power clamp element, and the VSS ESD protection element in the I/O ESD protection cell are adjacent to each other so they can be connected in a straight line or are arranged to partially overlap.
    Type: Application
    Filed: August 27, 2004
    Publication date: March 3, 2005
    Inventors: Han-gu Kim, Ki-tae Lee, Jae-hyok Ko, Woo-sub Kim, Sung-pil Jang
  • Patent number: 5174740
    Abstract: A scroll compressor includes a stationary scroll and an orbit scroll for circulating refrigerant. Lubricant is introduced into the refrigerant at an inlet side of the compressor to maintain a seal between the scrolls. Lubricant is separated from the refrigerant within a discharge chamber. A control mechanism varies the flow of lubricant into the refrigerant as a function of a pressure occurring at an outlet side of the scrolls, and also as a function of the amount of lubricant present in the discharge chamber.
    Type: Grant
    Filed: July 31, 1991
    Date of Patent: December 29, 1992
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sung-Pil Jang