Patents by Inventor Sung-ryong MOON

Sung-ryong MOON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10424672
    Abstract: An oxide semiconductor transistor according to an exemplary embodiment of the present invention includes: a substrate; a first gate electrode disposed on the substrate; a gate insulating layer disposed on the substrate and the first gate electrode; an oxide semiconductor layer disposed on the gate insulating layer; an etch stopper layer disposed on the oxide semiconductor layer; and a source electrode and a drain electrode disposed on the oxide semiconductor layer and the etch stopper layer and spaced apart from each other.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: September 24, 2019
    Assignee: SILICON DISPLAY TECHNOLOGY
    Inventors: Suhui Lee, Sung-ryong Moon, Jaemin Kim
  • Publication number: 20180166544
    Abstract: The present invention relates to an oxide semiconductor thin film transistor and a manufacturing method thereof, and the manufacturing method of the oxide semiconductor thin film transistor includes: a first step for depositing and patterning a gate layer on a substrate to form a gate electrode; a second step for depositing a gate insulation layer on the gate electrode; a third step for depositing and patterning an oxide semiconductor on the gate insulation layer; and a fourth step for treating a plasma including fluorine (F) on the oxide semiconductor.
    Type: Application
    Filed: June 30, 2015
    Publication date: June 14, 2018
    Applicant: SILICON DISPLAY TECHNOLOGY
    Inventors: Soon Ho CHOI, Sung Ryong MOON
  • Publication number: 20170243978
    Abstract: An oxide semiconductor transistor according to an exemplary embodiment of the present invention includes: a substrate; a first gate electrode disposed on the substrate; a gate insulating layer disposed on the substrate and the first gate electrode; an oxide semiconductor layer disposed on the gate insulating layer; an etch stopper layer disposed on the oxide semiconductor layer; and a source electrode and a drain electrode disposed on the oxide semiconductor layer and the etch stopper layer and spaced apart from each other.
    Type: Application
    Filed: February 17, 2017
    Publication date: August 24, 2017
    Inventors: Suhui LEE, Sung-ryong MOON, Jaemin KIM