Patents by Inventor Sung-ryoul Bae

Sung-ryoul Bae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8975693
    Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type, a buried layer a second conductivity type different from the first conductivity type on the substrate and an epitaxial layer of the second conductivity type on the buried layer. The device further includes a pocket well of the first conductivity type in the epitaxial layer, a first drift region in the epitaxial layer at least partially overlapping the pocket well, a second drift region in the epitaxial layer and spaced apart from the first drift region, and a body region of the first conductivity type in the pocket well. A gate electrode is disposed on the body region, the pocket well and the first drift region and has an edge overlying the epitaxial region between the first and second drift regions.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: March 10, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eung-Kyu Lee, Jae-June Jang, Hoon Chang, Min-Hwan Kim, Sung-Ryoul Bae, Dong-Eun Jang
  • Publication number: 20130256794
    Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type, a buried layer a second conductivity type different from the first conductivity type on the substrate and an epitaxial layer of the second conductivity type on the buried layer. The device further includes a pocket well of the first conductivity type in the epitaxial layer, a first drift region in the epitaxial layer at least partially overlapping the pocket well, a second drift region in the epitaxial layer and spaced apart from the first drift region, and a body region of the first conductivity type in the pocket well. A gate electrode is disposed on the body region, the pocket well and the first drift region and has an edge overlying the epitaxial region between the first and second drift regions.
    Type: Application
    Filed: November 21, 2012
    Publication date: October 3, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Eung-Kyu Lee, Jae-June Jang, Hoon Chang, Min-Hwan Kim, Sung-Ryoul Bae, Dong-Eun Jang
  • Patent number: 8445357
    Abstract: Provided are a method of fabricating a semiconductor integrated circuit device and a semiconductor integrated circuit device fabricated using the method. The method includes: forming a mask film, which exposes a portion of a substrate, on the substrate; forming a first buried impurity layer, which contains impurities of a first conductivity type and of a first concentration, in a surface of the exposed portion of the substrate by using the mask film; removing the mask film; forming a second buried impurity layer, which contains impurities of a second conductivity type and of a second concentration, using blank implantation; and forming an epitaxial layer on the substrate having the first and second buried impurity layers, wherein the first concentration is higher than the second concentration.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: May 21, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Don Kim, Eung-Kyu Lee, Sung-Ryoul Bae, Soo-Bang Kim, Dong-Eun Jang
  • Patent number: 8163639
    Abstract: A method of fabricating a photo diode includes sequentially forming a buried layer of a first conductivity type, a first epitaxial layer of the first conductivity type, and a second epitaxial layer of a second conductivity type on a semiconductor substrate; forming a doped oxide film, including impurities of the second conductivity type, on the second epitaxial layer; forming a silicon nitride film on the oxide film; and patterning the oxide film and the silicon nitride film to sequentially form an oxide film pattern of the second conductivity type and a silicon nitride film pattern, respectively. The second conductivity type impurities are diffused from the oxide film pattern into the second epitaxial layer using a heat diffusion process to form a doped shallow junction layer of the second conductivity type, which converts the oxide film pattern into a non-conductive oxide film pattern.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: April 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kye-wong Maeng, Sung-ryoul Bae
  • Publication number: 20110241171
    Abstract: Provided are a method of fabricating a semiconductor integrated circuit device and a semiconductor integrated circuit device fabricated using the method. The method includes: forming a mask film, which exposes a portion of a substrate, on the substrate; forming a first buried impurity layer, which contains impurities of a first conductivity type and of a first concentration, in a surface of the exposed portion of the substrate by using the mask film; removing the mask film; forming a second buried impurity layer, which contains impurities of a second conductivity type and of a second concentration, using blank implantation; and forming an epitaxial layer on the substrate having the first and second buried impurity layers, wherein the first concentration is higher than the second concentration.
    Type: Application
    Filed: March 30, 2010
    Publication date: October 6, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yong-Don Kim, Eung-Kyu Lee, Sung-Ryoul Bae, Soo-Bang Kim, Dong-Eun Jang
  • Publication number: 20090130793
    Abstract: A method of fabricating a photo diode includes sequentially forming a buried layer of a first conductivity type, a first epitaxial layer of the first conductivity type, and a second epitaxial layer of a second conductivity type on a semiconductor substrate; forming a doped oxide film, including impurities of the second conductivity type, on the second epitaxial layer; forming a silicon nitride film on the oxide film; and patterning the oxide film and the silicon nitride film to sequentially form an oxide film pattern of the second conductivity type and a silicon nitride film pattern, respectively. The second conductivity type impurities are diffused from the oxide film pattern into the second epitaxial layer using a heat diffusion process to form a doped shallow junction layer of the second conductivity type, which converts the oxide film pattern into a non-conductive oxide film pattern.
    Type: Application
    Filed: December 19, 2008
    Publication date: May 21, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kye-wong MAENG, Sung-ryoul BAE
  • Patent number: 7482665
    Abstract: A photo diode includes a buried layer of first conductivity type, an epitaxial layer of first conductivity type and an epitaxial layer second conductivity type which are sequentially formed on a semiconductor substrate, a doped shallow junction layer of second conductivity type which is formed using a solid state diffusion process from a surface region to an internal region of the epitaxial layer of second conductivity type, and a silicon oxide film pattern and a silicon nitride film pattern which are sequentially formed on the shallow junction layer.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: January 27, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kye-won Maeng, Sung-ryoul Bae
  • Patent number: 7476598
    Abstract: A photodiode and a method of manufacturing the photodiode are provided. The method includes forming a diode junction structure including a light receiving unit and an electrode unit on a semiconductor substrate, forming a buffer oxide layer and an etching blocking layer on the junction structure, forming an interlayer insulating layer and an intermetal insulating layer and an interconnecting structure, exposing the etching blocking layer by etching the intermetal insulating layer and the interlayer insulating layer, removing a portion of the etching blocking layer and the buffer oxide layer of the light-receiving unit by dry etching, and exposing a semiconductor surface of the light-receiving unit by wet etching.
    Type: Grant
    Filed: February 2, 2007
    Date of Patent: January 13, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-Sung Son, Sung-Ryoul Bae, Dong-Kyun Nam
  • Publication number: 20090008739
    Abstract: Methods of manufacturing a photo diode include sequentially forming a buried layer of a first conductivity type, a first epitaxial layer of the first conductivity type, and a second epitaxial layer of a second conductivity type on a substrate. The second and first epitaxial layers are etched to form a trench that exposes a portion of the buried layer. A conductive plug of the first conductivity type is formed in the trench. A first electrode is formed on an upper surface of the second epitaxial layer. A second electrode may be formed to contact an upper surface of the conductive plug. Photodiodes having a conductive plug contact to a buried layer are also provided.
    Type: Application
    Filed: September 17, 2008
    Publication date: January 8, 2009
    Inventors: Sung-ryoul Bae, Dong-kyun Nam
  • Patent number: 7465638
    Abstract: There is provided a bipolar transistor (with a respective fabrication method) that provides superior noise characteristics and gain diffusion. The fabricating method includes forming a first base region at a collector region, which in turn is formed on a substrate. A first silicon layer is formed on the base region, and a second silicon layer is formed on the first silicon layer using a forming method different from the method used in forming the first silicon layer. An emitter region is then formed from impurities at the base region by performing a thermal process.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: December 16, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kye-Won Maeng, Sung-Ryoul Bae, Dong-Kyun Nam, Tae-Jin Kim
  • Patent number: 7427530
    Abstract: Methods of manufacturing a photo diode include sequentially forming a buried layer of a first conductivity type, a first epitaxial layer of the first conductivity type, and a second epitaxial layer of a second conductivity type on a substrate. The second and first epitaxial layers are etched to form a trench that exposes a portion of the buried layer. A conductive plug of the first conductivity type is formed in the trench. A first electrode is formed on an upper surface of the second epitaxial layer. A second electrode may be formed to contact an upper surface of the conductive plug. Photodiodes having a conductive plug contact to a buried layer are also provided.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: September 23, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-ryoul Bae, Dong-kyun Nam
  • Publication number: 20070243656
    Abstract: A photodiode and a method of manufacturing the photodiode are provided. The method includes forming a diode junction structure including a light receiving unit and an electrode unit on a semiconductor substrate, forming a buffer oxide layer and an etching blocking layer on the junction structure, forming an interlayer insulating layer and an intermetal insulating layer and an interconnecting structure, exposing the etching blocking layer by etching the intermetal insulating layer and the interlayer insulating layer, removing a portion of the etching blocking layer and the buffer oxide layer of the light-receiving unit by dry etching, and exposing a semiconductor surface of the light-receiving unit by wet etching.
    Type: Application
    Filed: February 2, 2007
    Publication date: October 18, 2007
    Inventors: Ho-Sung Son, Sung-Ryoul Bae, Dong-Kyun Nam
  • Patent number: 7190012
    Abstract: A photodiode and a method of manufacturing the photodiode are provided. The method includes forming a diode junction structure including a light receiving unit and an electrode unit on a semiconductor substrate, forming a buffer oxide layer and an etching blocking layer on the junction structure, forming an interlayer insulating layer and an intermetal insulating layer and an interconnecting structure, exposing the etching blocking layer by etching the intermetal insulating layer and the interlayer insulating layer, removing a portion of the etching blocking layer and the buffer oxide layer of the light-receiving unit by dry etching, and exposing a semiconductor surface of the light-receiving unit by wet etching.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: March 13, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-Sung Son, Sung-Ryoul Bae, Dong-Kyun Nam
  • Patent number: 7135349
    Abstract: Photodiodes and methods of fabricating photodiodes are provided. For example, a method of fabricating a photodiode includes forming a buried layer of a first conductive type on a semiconductor substrate and forming a first intrinsic capping epitaxial layer on the buried layer. A first intrinsic epitaxial layer of the first conductive type is formed on the first intrinsic capping epitaxial layer. A first junction region of the first conductive type is formed in the first intrinsic epitaxial layer. A second intrinsic epitaxial layer of the second conductive type is formed on the first junction region and the first intrinsic epitaxial layer. A second intrinsic capping epitaxial layer is formed on the second intrinsic epitaxial layer. A second junction region of the first conductive type is formed such that the second junction region passes through the second intrinsic capping epitaxial layer and the second intrinsic epitaxial layer. The second junction region contacts the first junction region.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: November 14, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kye-Won Maeng, Sung-Ryoul Bae
  • Publication number: 20060252214
    Abstract: There is provided a bipolar transistor (with a respective fabrication method) that provides superior noise characteristics and gain diffusion. The fabricating method includes forming a first base region at a collector region, which in turn is formed on a substrate. A first silicon layer is formed on the base region, and a second silicon layer is formed on the first silicon layer using a forming method different from the method used in forming the first silicon layer. An emitter region is then formed from impurities at the base region by performing a thermal process.
    Type: Application
    Filed: April 27, 2006
    Publication date: November 9, 2006
    Inventors: Kye-Won Maeng, Sung-Ryoul Bae, Dong-Kyun Nam, Tae-Jin Kim
  • Publication number: 20050263840
    Abstract: A photo diode includes a buried layer of first conductivity type, an epitaxial layer of first conductivity type and an epitaxial layer second conductivity type which are sequentially formed on a semiconductor substrate, a doped shallow junction layer of second conductivity type which is formed using a solid state diffusion process from a surface region to an internal region of the epitaxial layer of second conductivity type, and a silicon oxide film pattern and a silicon nitride film pattern which are sequentially formed on the shallow junction layer.
    Type: Application
    Filed: April 1, 2005
    Publication date: December 1, 2005
    Inventors: Kye-won Maeng, Sung-ryoul Bae
  • Patent number: 6930008
    Abstract: A method of fabricating a complementary bipolar junction transistor includes forming a polycrystalline silicon layer on an NPN bipolar junction transistor region and a PNP bipolar junction transistor region, respectively implanting an N-type impurity and a P-type impurity into the polycrystalline silicon layer, and then diffusing to respectively form an N-type emitter region and a P-type emitter region within a P-type base region and an N-type base region. By patterning the polycrystalline silicon layer, an N-type emitter electrode and a P-type emitter electrode are simultaneously formed. The polycrystalline silicon layer is used for simultaneously forming the N-type emitter electrode of the NPN bipolar junction transistor and the P-type emitter electrode of the PNP bipolar junction transistor by a single depositing and etching process.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: August 16, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-kyun Nam, Sung-ryoul Bae
  • Publication number: 20050148135
    Abstract: A method of fabricating a complementary bipolar junction transistor includes forming a polycrystalline silicon layer on an NPN bipolar junction transistor region and a PNP bipolar junction transistor region, respectively implanting an N-type impurity and a P-type impurity into the polycrystalline silicon layer, and then diffusing to respectively form an N-type emitter region and a P-type emitter region within a P-type base region and an N-type base region. By patterning the polycrystalline silicon layer, an N-type emitter electrode and a P-type emitter electrode are simultaneously formed. The polycrystalline silicon layer is used for simultaneously forming the N-type emitter electrode of the NPN bipolar junction transistor and the P-type emitter electrode of the PNP bipolar junction transistor by a single depositing and etching process.
    Type: Application
    Filed: December 30, 2004
    Publication date: July 7, 2005
    Inventors: Dong-kyun Nam, Sung-ryoul Bae
  • Publication number: 20050133838
    Abstract: A photodiode and a method of manufacturing the photodiode are provided. The method includes forming a diode junction structure including a light receiving unit and an electrode unit on a semiconductor substrate, forming a buffer oxide layer and an etching blocking layer on the junction structure, forming an interlayer insulating layer and an intermetal insulating layer and an interconnecting structure, exposing the etching blocking layer by etching the intermetal insulating layer and the interlayer insulating layer, removing a portion of the etching blocking layer and the buffer oxide layer of the light-receiving unit by dry etching, and exposing a semiconductor surface of the light-receiving unit by wet etching.
    Type: Application
    Filed: December 2, 2004
    Publication date: June 23, 2005
    Inventors: Ho-Sung Son, Sung-Ryoul Bae, Dong-Kyun Nam
  • Publication number: 20050118743
    Abstract: Photodiodes and methods of fabricating photodiodes are provided. For example, a method of fabricating a photodiode includes forming a buried layer of a first conductive type on a semiconductor substrate and forming a first intrinsic capping epitaxial layer on the buried layer. A first intrinsic epitaxial layer of the first conductive type is formed on the first intrinsic capping epitaxial layer. A first junction region of the first conductive type is formed in the first intrinsic epitaxial layer. A second intrinsic epitaxial layer of the second conductive type is formed on the first junction region and the first intrinsic epitaxial layer. A second intrinsic capping epitaxial layer is formed on the second intrinsic epitaxial layer. A second junction region of the first conductive type is formed such that the second junction region passes through the second intrinsic capping epitaxial layer and the second intrinsic epitaxial layer. The second junction region contacts the first junction region.
    Type: Application
    Filed: October 22, 2004
    Publication date: June 2, 2005
    Inventors: Kye-Won Maeng, Sung-Ryoul Bae