Patents by Inventor Sung Yea

Sung Yea has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • NOVEL NAPHTHYRIDINONE DERIVATIVE HAVING INHIBITORY ACTIVITY AGAINST ECTONUCLEOTIDE PYROPHOSPHATASE-PHOSPHODIESTERASE AND USE THEREOF
    Publication number: 20240140944
    Abstract: The present invention relates to a novel naphthyridinone derivative compound, a pharmaceutically acceptable salt thereof, a hydrate thereof, or a stereoisomer thereof, which are each relevant to a compound for inhibiting ENPP1, a composition for inhibiting ENPP1, and a method for inhibiting ENPP1.
    Type: Application
    Filed: December 29, 2021
    Publication date: May 2, 2024
    Applicant: TXINNO BIOSCIENCE INC.
    Inventors: Seo Jung Han, Chan Sun Park, Sung Joon Kim, Jae Eun Cheong, Jung Hwan Choi, Ali Imran, Sun Woo Lee, Yong Yea Park, Ah Ran Yu, Sun Young Park
  • NOVEL BENZOTRIAZOLE DERIVATIVE HAVING INHIBITORY ACTIVITY AGAINST ECTONUCLEOTIDE PYROPHOSPHATASE-PHOSPHODIESTERASE, AND USE THEREOF
    Publication number: 20240116882
    Abstract: The present invention relates to a novel benzotriazole derivative compound, a tautomer thereof, a pharmaceutically acceptable salt thereof, a hydrate thereof, or a stereoisomer thereof, which are related to a compound for inhibiting ENPP1, a composition for inhibiting ENPP1, and a method for inhibiting ENPP1.
    Type: Application
    Filed: January 28, 2022
    Publication date: April 11, 2024
    Applicant: TXINNO BIOSCIENCE INC.
    Inventors: Chan Sun Park, Sung Joon Kim, Ali Imran, Yoo Jin Na, So Ra Paik, Jung Hwan Choi, Sun Woo Lee, Yong Yea Park, Ah Ran Yu, Sun Young Park
  • SMT three phase inverter package and lead frame
    Publication number: 20060043545
    Abstract: A surface mounted package for semiconductor die has a lead frame with a first and elongated die pad which receives three MOSgated die spaced along its length; second, third and fourth die pads laterally spaced from the first die pad and in a row parallel to the first die pad and receiving respective MOSgated die. A central wire bond receiving pad is disposed between the first pad and the spaced second, third and fourth pads. Wire bonds then connect the die into a three phase inverter circuit. Pin connectors extend through a plastic housing covering the top of the lead frame and are connectable, with the die pads, to the surface of a PCB.
    Type: Application
    Filed: September 1, 2005
    Publication date: March 2, 2006
    Inventors: Sung Yea, Sam Sundaram, Vijay Bolloju
  • Microelectronic relay with upset and downset lead frames
    Patent number: 6373078
    Abstract: A dual plane microelectronic relay comprises an input lead frame for carrying an LED an output lead frame carrying a PVG and FETs which are turned on by the output of the PVG in response to its illumination by the LED. Each lead frame is offset in opposite directions so that the lead frame segments carrying the LED and FETs are disposed atop one another while their extending contact pins are coplanar and in line. The PVG and LEDs along the lead frames are accurately located relative to one another by indexed tabs on the side rails of the lead frames. A clear silastic fills the volume between the PVG and LED and the individual units are transfer molded, using an opening in the lead frame rail as a mold gate. A 6 terminal SOP-6 package is formed.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: April 16, 2002
    Assignee: International Rectifier Corp.
    Inventor: Sung Yea