Abstract: Methods and structures for modulating an inner spacer profile include providing a fin having an epitaxial layer stack including a plurality of semiconductor channel layers interposed by a plurality of dummy layers. In some embodiments, the method further includes removing the plurality of dummy layers to form a first gap between adjacent semiconductor channel layers of the plurality of semiconductor channel layers. Thereafter, in some examples, the method includes conformally depositing a dielectric layer to substantially fill the first gap between the adjacent semiconductor channel layers. In some cases, the method further includes etching exposed lateral surfaces of the dielectric layer to form an etched-back dielectric layer that defines substantially V-shaped recesses. In some embodiments, the method further includes forming a substantially V-shaped inner spacer within the substantially V-shaped recesses.

Abstract: A driving circuit includes a first transistor, a capacitor, a second transistor, and a driving transistor. The first transistor is configured to provide a data signal according to a first scan signal. The capacitor is coupled to the first transistor, and the capacitor includes a first terminal and a second terminal. The second transistor is coupled to the first transistor, and the second transistor is configured to provide a start signal according to the data signal. The driving transistor is coupled to the second transistor, and the driving transistor is configured to output a driving signal according to the start signal.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A method of forming a FinFET is disclosed. The method includes depositing a conductive material across each of a number of adjacent fins, depositing a sacrificial mask over the conductive material, patterning the conductive material with the sacrificial mask to form a plurality of conductive material segments, depositing a sacrificial layer over the sacrificial mask, and patterning the sacrificial layer, where a portion of the patterned sacrificial layer remains over the sacrificial mask, where a portion of the sacrificial mask is exposed, and where the exposed portion of the sacrificial mask extends across each of the adjacent fins. The method also includes removing the portion of the sacrificial layer over the sacrificial mask, after removing the portion of the sacrificial layer over the sacrificial mask, removing the sacrificial mask, epitaxially growing a plurality of source/drain regions from the semiconductor substrate, and electrically connecting the source/drain regions to other devices.

Abstract: A device includes first and second dies and a seal ring. The first die includes a top dielectric layer. The second die is over the first die. The second die includes a bottom dielectric layer bonded to the top dielectric layer of the first die at an interface between the first die and the second die. The seal ring extends from the first die to the second die through the interface. A portion of the top dielectric layer of the first die and a portion of the bottom dielectric layer of the second die are separated by a gap outside the seal ring.

Abstract: A device includes first and second dies and a seal ring. The first die includes a top dielectric layer. The second die is over the first die. The second die includes a bottom dielectric layer bonded to the top dielectric layer of the first die at an interface between the first die and the second die. The seal ring extends from the first die to the second die through the interface. A portion of the top dielectric layer of the first die and a portion of the bottom dielectric layer of the second die are separated by a gap outside the seal ring.