Patents by Inventor Sung-Yueh Wu

Sung-Yueh Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230386974
    Abstract: A semiconductor package and a manufacturing method are provided. The semiconductor package includes a carrier substrate, a through substrate via (TSV), a first conductive pattern, and an encapsulated die. The TSV penetrates through the carrier substrate and includes a first portion and a second portion connected to the first portion, the first portion includes a first slanted sidewall with a first slope, the second portion includes a second slanted sidewall with a second slope, and the first slope is substantially milder than the second slope. The first conductive pattern is disposed on the carrier substrate and connected to the first portion of the TSV. The encapsulated die is disposed on the carrier substrate and electrically coupled to the TSV through the first conductive pattern.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 30, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jen-Chun Liao, Sung-Yueh Wu, Chien-Ling Hwang, Ching-Hua Hsieh
  • Publication number: 20230387039
    Abstract: A semiconductor package includes a first package component comprising: an integrated circuit die; an encapsulant surrounding the integrated circuit die; and a fan-out structure electrically connected to the integrated circuit die, wherein a first opening extends completely through the fan-out structure and at least partially through the encapsulant in a cross-sectional view, and wherein the encapsulant at least completely surrounds the first opening in a top-down view. The semiconductor package further includes a package substrate bonded to the first package component.
    Type: Application
    Filed: August 4, 2022
    Publication date: November 30, 2023
    Inventors: Sung-Yueh Wu, Jen-Chun Liao, Mao-Yen Chang, Yu-Chia Lai, Chien Ling Hwang, Ching-Hua Hsieh
  • Publication number: 20230378040
    Abstract: A package structure includes a carrier substrate, a die, and an encapsulant. The carrier substrate includes through carrier vias (TCV). The die is disposed over the carrier substrate. The die includes a semiconductor substrate and conductive posts disposed over the semiconductor substrate. The conductive posts face away from the carrier substrate. The encapsulant laterally encapsulates the die.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 23, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sung-Yueh Wu, Chien-Ling Hwang, Jen-Chun Liao, Ching-Hua Hsieh, Pei-Hsuan Lee, Chia-Hung Liu
  • Patent number: 11764127
    Abstract: A semiconductor package and a manufacturing method are provided. The semiconductor package includes a carrier substrate, a through substrate via (TSV), a first conductive pattern, and an encapsulated die. The TSV penetrates through the carrier substrate and includes a first portion and a second portion connected to the first portion, the first portion includes a first slanted sidewall with a first slope, the second portion includes a second slanted sidewall with a second slope, and the first slope is substantially milder than the second slope. The first conductive pattern is disposed on the carrier substrate and connected to the first portion of the TSV. The encapsulated die is disposed on the carrier substrate and electrically coupled to the TSV through the first conductive pattern.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: September 19, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jen-Chun Liao, Sung-Yueh Wu, Chien-Ling Hwang, Ching-Hua Hsieh
  • Patent number: 11756872
    Abstract: A package structure includes a carrier substrate, a die, and a first redistribution structure. The carrier substrate has a first surface and a second surface opposite to the first surface. The carrier substrate includes an insulating body and through carrier vias (TCV) embedded in the insulating body. The die is disposed over the firs surface of the carrier substrate. The die is electrically connected to the TCVs. The first redistribution structure is disposed on the second surface of the carrier substrate.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: September 12, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sung-Yueh Wu, Chien-Ling Hwang, Jen-Chun Liao, Ching-Hua Hsieh, Pei-Hsuan Lee, Chia-Hung Liu
  • Publication number: 20230268316
    Abstract: A package structure includes a semiconductor device including a conductive feature, a joint layer, a pillar structure, an encapsulant and a RDL structure. The joint layer is disposed on the conductive feature. The pillar structure is disposed on and coupled to the semiconductor device through the joint layer. The encapsulant laterally encapsulates the semiconductor device and the pillar structure. The RDL structure is electrically connected to the semiconductor device.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 24, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sung-Yueh Wu, Chien-Ling Hwang, Jen-Chun Liao, Ching-Hua Hsieh
  • Patent number: 11532551
    Abstract: A semiconductor package includes a semiconductor device, an encapsulating material, and a redistribution structure. The semiconductor device includes a chamfer disposed on one of a plurality of side surfaces of the semiconductor device. The encapsulating material encapsulates the semiconductor device. The redistribution structure is disposed over the encapsulating material and electrically connected to the semiconductor device.
    Type: Grant
    Filed: December 24, 2018
    Date of Patent: December 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Shi Liu, Ching-Hua Hsieh, Chen-Hua Yu, Hsin-Hung Liao, Chien-Ling Hwang, Sung-Yueh Wu
  • Publication number: 20220319903
    Abstract: An apparatus and a method for handling a semiconductor substrate are provided. The apparatus includes a chuck table and a first flexible member. The chuck table includes a carrying surface, a first recess provided within the carrying surface, and a vacuum channel disposed below the carrying surface, and the chuck table is configured to hold the semiconductor substrate. The first flexible member is disposed within the first recess and includes a top surface protruded from the first recess, and the first flexible member is compressed as the semiconductor substrate presses against the first flexible member.
    Type: Application
    Filed: July 6, 2021
    Publication date: October 6, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jen-Chun Liao, Sung-Yueh Wu, Chien-Ling Hwang, Ching-Hua Hsieh
  • Publication number: 20220293505
    Abstract: A package structure includes a carrier substrate, a die, and a first redistribution structure. The carrier substrate has a first surface and a second surface opposite to the first surface. The carrier substrate includes an insulating body and through carrier vias (TCV) embedded in the insulating body. The die is disposed over the firs surface of the carrier substrate. The die is electrically connected to the TCVs. The first redistribution structure is disposed on the second surface of the carrier substrate.
    Type: Application
    Filed: March 11, 2021
    Publication date: September 15, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sung-Yueh Wu, Chien-Ling Hwang, Jen-Chun Liao, Ching-Hua Hsieh, Pei-Hsuan Lee, Chia-Hung Liu
  • Publication number: 20220278023
    Abstract: A semiconductor package and a manufacturing method are provided. The semiconductor package includes a carrier substrate, a through substrate via (TSV), a first conductive pattern, and an encapsulated die. The TSV penetrates through the carrier substrate and includes a first portion and a second portion connected to the first portion, the first portion includes a first slanted sidewall with a first slope, the second portion includes a second slanted sidewall with a second slope, and the first slope is substantially milder than the second slope. The first conductive pattern is disposed on the carrier substrate and connected to the first portion of the TSV. The encapsulated die is disposed on the carrier substrate and electrically coupled to the TSV through the first conductive pattern.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 1, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jen-Chun Liao, Sung-Yueh Wu, Chien-Ling Hwang, Ching-Hua Hsieh
  • Patent number: 10867890
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a first semiconductor die, at least one first conductive connector disposed beside the first semiconductor die and electrically coupled to the first semiconductor die, an insulating encapsulation laterally encapsulating the first semiconductor die and the at least one first conductive connector, and a redistribution structure disposed on the insulating encapsulation and being in contact with the first semiconductor die and the at least one first conductive connector. A thickness of the at least one first conductive connector is less than a thickness of the insulating encapsulation.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Ling Hwang, Ching-Hua Hsieh, Hsin-Hung Liao, Sung-Yueh Wu
  • Patent number: 10837754
    Abstract: A wireless passive strain sensor is provided. The wireless passive strain sensor includes an outer coil holder, a reading inductance coil, a capacitance patch, an inner coil holder, and a sensing inductance coil. A shaft penetrates through the outer coil holder. The reading inductance coil is disposed on the outer coil holder. The capacitance patch is disposed on the shaft. The inner coil holder is disposed inside the outer coil holder. The inner coil holder is disposed on the shaft. The sensing inductance coil is disposed on the inner coil holder. The sensing inductance coil is electrically connected to the capacitance patch.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: November 17, 2020
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Wen-Syang Hsu, Sung-Yueh Wu, Cheng Tu, Chia-Min Chao
  • Patent number: 10704987
    Abstract: A smart mechanical component has a mechanical part main body; a mechanical part secondary body located inside of the mechanical part main body; a three dimensional three-dimensional (3-D) reserved space located between the mechanical part main body and the mechanical part secondary body; at least one connecting unit connecting the mechanical part main body and the mechanical part secondary body; wherein the mechanical part main body, the mechanical part secondary body and the three dimensional three-dimensional (3-D) reserved space form a capacitor; the connecting unit forms an inductor; the inductor and the capacitor forms an inductor-capacitor circuit.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: July 7, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Sung-Yueh Wu, De-Yau Lin, An-Li Chen, Ching-Chih Lin, Chuan-Sheng Chuang, Wei-Chin Huang
  • Publication number: 20200203270
    Abstract: A semiconductor package includes a semiconductor device, an encapsulating material, and a redistribution structure. The semiconductor device includes a chamfer disposed on one of a plurality of side surfaces of the semiconductor device. The encapsulating material encapsulates the semiconductor device. The redistribution structure is disposed over the encapsulating material and electrically connected to the semiconductor device.
    Type: Application
    Filed: December 24, 2018
    Publication date: June 25, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Shi Liu, Ching-Hua Hsieh, Chen-Hua Yu, Hsin-Hung Liao, Chien-Ling Hwang, Sung-Yueh Wu
  • Publication number: 20200105689
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a first semiconductor die, at least one first conductive connector disposed beside the first semiconductor die and electrically coupled to the first semiconductor die, an insulating encapsulation laterally encapsulating the first semiconductor die and the at least one first conductive connector, and a redistribution structure disposed on the insulating encapsulation and being in contact with the first semiconductor die and the at least one first conductive connector. A thickness of the at least one first conductive connector is less than a thickness of the insulating encapsulation.
    Type: Application
    Filed: March 5, 2019
    Publication date: April 2, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Ling Hwang, Ching-Hua Hsieh, Hsin-Hung Liao, Sung-Yueh Wu
  • Publication number: 20190301847
    Abstract: A wireless passive strain sensor is provided. The wireless passive strain sensor includes an outer coil holder, a reading inductance coil, a capacitance patch, an inner coil holder, and a sensing inductance coil. A shaft penetrates through the outer coil holder. The reading inductance coil is disposed on the outer coil holder. The capacitance patch is disposed on the shaft. The inner coil holder is disposed inside the outer coil holder. The inner coil holder is disposed on the shaft. The sensing inductance coil is disposed on the inner coil holder. The sensing inductance coil is electrically connected to the capacitance patch.
    Type: Application
    Filed: February 4, 2019
    Publication date: October 3, 2019
    Inventors: WEN-SYANG HSU, SUNG-YUEH WU, CHENG TU, CHIA-MIN CHAO
  • Patent number: 10052063
    Abstract: A sensing bone fixing element includes a fixing portion, a fastening portion, a capacitor structure, and a coil. The fastening portion is fixed to the fixing portion and suitable for being fastened to a bone. The fastening portion passes through the capacitor structure which has a capacitance value and includes a first conductive layer, a second conductive layer, and an elastic dielectric layer. The first conductive layer leans against the fixing portion, the second conductive layer leans against the bone, and the elastic dielectric layer is located between the first conductive layer and the second conductive layer. The coil has an inductance value, and two ends of the coil are respectively connected to the first conductive layer and the second conductive layer. The coil receives a detection radio frequency (RF) signal and generates a responding RF signal according to variations in the capacitance value and the inductance value.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: August 21, 2018
    Assignees: National Chiao Tung University, National Taiwan University Hospital Hsin-Chu Branch
    Inventors: Wen-Syang Hsu, Tze-Hong Wong, Asher Sun, Sung-Yueh Wu
  • Publication number: 20180136153
    Abstract: A smart mechanical component has a mechanical part main body; a mechanical part secondary body located inside of the mechanical part main body; a three dimensional three-dimensional (3-D) reserved space located between the mechanical part main body and the mechanical part secondary body; at least one connecting unit connecting the mechanical part main body and the mechanical part secondary body; wherein the mechanical part main body, the mechanical part secondary body and the three dimensional three-dimensional (3-D) reserved space form a capacitor; the connecting unit forms an inductor; the inductor and the capacitor forms an inductor-capacitor circuit.
    Type: Application
    Filed: March 10, 2017
    Publication date: May 17, 2018
    Inventors: SUNG-YUEH WU, De-Yau LIN, An-Li CHEN, Ching-Chih LIN, Chuan-Sheng CHUANG, Wei-Chin HUANG
  • Patent number: 9867551
    Abstract: The present invention discloses a two-stage locating device and the method thereof. In stage-one, the preliminary locating device finds the approximate area of the locking hole encircled with the magnetic material on the intramedullary nail. In stage-two, the pinpoint device has a plurality of targeting devices and includes a transparent plate with a plurality of alignment lines. According to the deviations between each pointing device and the alignment lines, the direction of the pinpoint device for further adjustment can be determined. The present invention can determine the position and the orientation of the locking hole on the intramedullary nail quickly and precisely to shorten the time spent to implant the intramedullary nail. Furthermore, the present invention can also have a conductive circuit to connect to an alarm device. Thus, the precise location can be determined through the different alarm signals based on the contact conditions between each directing devices and the conductive circuit.
    Type: Grant
    Filed: September 3, 2014
    Date of Patent: January 16, 2018
    Assignees: NATIONAL CHIAO TUNG UNIVERSITY, NATIONAL TAIWAN UNIVERSITY HOSPITAL HSIN-CHU BRANCH
    Inventors: Meng-Shiue Lee, Sung-Yueh Wu, Wensyang Hsu, Tze-Hong Wong, Tien-Kan Chung, Chia-Pei Wu
  • Publication number: 20170112436
    Abstract: A sensing bone fixing element includes a fixing portion, a fastening portion, a capacitor structure, and a coil. The fastening portion is fixed to the fixing portion and suitable for being fastened to a bone. The fastening portion passes through the capacitor structure which has a capacitance value and includes a first conductive layer, a second conductive layer, and an elastic dielectric layer. The first conductive layer leans against the fixing portion, the second conductive layer leans against the bone, and the elastic dielectric layer is located between the first conductive layer and the second conductive layer. The coil has an inductance value, and two ends of the coil are respectively connected to the first conductive layer and the second conductive layer. The coil receives a detection radio frequency (RF) signal and generates a responding RF signal according to variations in the capacitance value and the inductance value.
    Type: Application
    Filed: December 31, 2015
    Publication date: April 27, 2017
    Inventors: Wen-Syang Hsu, Tze-Hong Wong, Asher Sun, Sung-Yueh Wu