Patents by Inventor Sunghan Do
Sunghan Do has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12676630Abstract: An apparatus configured to transmit and receive a radio frequency (RF) signal is provided. The apparatus includes a digital-to-analog converter (DAC) configured to convert a digital signal into an analog signal, a power amplifier configured to amplify the analog signal, and an antenna configured to output, as the RF signal, the amplified analog signal to the outside. The DAC includes a current cell matrix including a plurality of current cells configured to generate the analog signal, a plurality of normal paths configured to control the plurality of current cells to be turned on or off, based on the digital signal, and a plurality of alternative paths configured to selectively consume power, based on a pattern of the digital signal.Type: GrantFiled: August 7, 2024Date of Patent: July 7, 2026Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Byungwoo Koo, Sangpil Nam, Sunghan Do, Junsang Park, Jungho Lee, Youngjae Cho, Michael Choi
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Patent number: 12671436Abstract: A digital-to-analog converter (DAC) for generating an analog output from a digital input includes a controller configured to generate a control signal based on the digital input, and a segment cell circuit including a plurality of segment cells turned on or off based on the control signal and configured to generate the analog output based on outputs of the plurality of segment cells, wherein the plurality of segment cells include a plurality of first segment cells each configured to generate an output corresponding to each of bits included in a first bit group of the digital input, a plurality of second segment cells each configured to generate an output corresponding to each of bits included in a second bit group of the digital input, and an additional segment cell configured to generate an output corresponding to a lowermost bit among the bits included in the second bit group.Type: GrantFiled: August 13, 2024Date of Patent: June 30, 2026Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Byungwoo Koo, Sunghan Do, Sangpil Nam, Youngjae Cho, Michael Choi
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Publication number: 20250175190Abstract: A digital-to-analog converter (DAC) circuit is provided. The DAC circuit includes: a serializer circuit including a plurality of multiplexers and configured to convert a parallel code in digital form into a serial code using the plurality of multiplexers; and a cell array including a plurality of unit cells and configured to output an analog signal based on the serial code. The serializer circuit includes: a pseudo random number generation circuit configured to generate random numbers in response to edges of a first clock signal; a first switch circuit connected to a first multiplexer; a second switch circuit connected to a second multiplexer; and a random number circuit configured to transmit different random numbers generated by the pseudo random number generation circuit in response to different edges of the first clock signal to the first switch circuit and the second switch circuit, respectively.Type: ApplicationFiled: June 12, 2024Publication date: May 29, 2025Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sangpil Nam, Byungwoo Koo, Sunghan Do, Jungho Lee, Youngjae Cho, Michael Choi
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Publication number: 20250070794Abstract: A digital-to-analog converter (DAC) for generating an analog output from a digital input includes a controller configured to generate a control signal based on the digital input, and a segment cell circuit including a plurality of segment cells turned on or off based on the control signal and configured to generate the analog output based on outputs of the plurality of segment cells, wherein the plurality of segment cells include a plurality of first segment cells each configured to generate an output corresponding to each of bits included in a first bit group of the digital input, a plurality of second segment cells each configured to generate an output corresponding to each of bits included in a second bit group of the digital input, and an additional segment cell configured to generate an output corresponding to a lowermost bit among the bits included in the second bit group.Type: ApplicationFiled: August 13, 2024Publication date: February 27, 2025Inventors: Byungwoo Koo, Sunghan Do, Sangpil Nam, Youngjae Cho, Michael Choi
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Publication number: 20240405782Abstract: An apparatus configured to transmit and receive a radio frequency (RF) signal is provided. The apparatus includes a digital-to-analog converter (DAC) configured to convert a digital signal into an analog signal, a power amplifier configured to amplify the analog signal, and an antenna configured to output, as the RF signal, the amplified analog signal to the outside. The DAC includes a current cell matrix including a plurality of current cells configured to generate the analog signal, a plurality of normal paths configured to control the plurality of current cells to be turned on or off, based on the digital signal, and a plurality of alternative paths configured to selectively consume power, based on a pattern of the digital signal.Type: ApplicationFiled: August 7, 2024Publication date: December 5, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Byungwoo Koo, Sangpil Nam, Sunghan Do, Junsang Park, Jungho Lee, Youngjae Cho, Michael Choi
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Patent number: 12081227Abstract: An apparatus configured to transmit and receive a radio frequency (RF) signal is provided. The apparatus includes a digital-to-analog converter (DAC) configured to convert a digital signal into an analog signal, a power amplifier configured to amplify the analog signal, and an antenna configured to output, as the RF signal, the amplified analog signal to the outside. The DAC includes a current cell matrix including a plurality of current cells configured to generate the analog signal, a plurality of normal paths configured to control the plurality of current cells to be turned on or off, based on the digital signal, and a plurality of alternative paths configured to selectively consume power, based on a pattern of the digital signal.Type: GrantFiled: May 19, 2022Date of Patent: September 3, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Byungwoo Koo, Sangpil Nam, Sunghan Do, Junsang Park, Jungho Lee, Youngjae Cho, Michael Choi
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Publication number: 20230071628Abstract: An apparatus configured to transmit and receive a radio frequency (RF) signal is provided. The apparatus includes a digital-to-analog converter (DAC) configured to convert a digital signal into an analog signal, a power amplifier configured to amplify the analog signal, and an antenna configured to output, as the RF signal, the amplified analog signal to the outside. The DAC includes a current cell matrix including a plurality of current cells configured to generate the analog signal, a plurality of normal paths configured to control the plurality of current cells to be turned on or off, based on the digital signal, and a plurality of alternative paths configured to selectively consume power, based on a pattern of the digital signal.Type: ApplicationFiled: May 19, 2022Publication date: March 9, 2023Applicant: SAMSUNG ELECTRONICS., LTD.Inventors: Byungwoo Koo, Sangpil Nam, Sunghan Do, Junsang Park, Jungho Lee, Youngjae Cho, Michael Choi
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Patent number: 10965299Abstract: A digital-to-analog converter (DAC) includes a current array having a plurality of unit cells in a plurality of rows and a plurality of columns, an arbitrary switch box and processing circuitry configured to randomly select a subset of rows among the plurality of rows based on a plurality of first row selection signals, the subset of rows including first unit cells among the plurality of unit cells, randomly select one row among the plurality of rows based on a plurality of second row selection signals, select a subset of columns among the plurality of columns based on column selection signals, second unit cells among the plurality of unit cells being included in both the one row and the subset of columns, and generate an analog output signal corresponding to a digital input signal based on the first unit cells and the second unit cells.Type: GrantFiled: May 29, 2020Date of Patent: March 30, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jungho Kim, Michael Choi, Byungwoo Koo, Hyungdong Roh, Sunghan Do, Youngjae Cho