Abstract: Proposed are a highly reliable metal molded article manufactured using a combination of a mold made of an anodic aluminum oxide film and a patternable mold, and a method for manufacturing the same.

Abstract: A polymer for a gel polymer electrolyte, a gel polymer electrolyte and a lithium secondary battery comprising the same are disclosed herein. In some embodiments, a polymer for the gel polymer electrolyte includes a copolymer having a main chain and a first side chain and a second side chain bonded to the main chain, wherein the main chain contains a fluoropolymer, wherein the first side chain contains a siloxane group and the second side chain contains an acrylic polymer. The polymer improves stability of a gel polymer electrolyte and a lithium secondary battery including the same.

Abstract: Proposed are a guide plate and a test device including the guide plate capable of being insulated from electrically conductive contact pins and capable of blocking signal interference between the electrically conductive contact pins.

Abstract: Proposed are an anodic aluminum oxide film-based interposer for electrical connection and a manufacturing method therefor, a semiconductor package and a manufacturing method therefor, a multi-stacked semiconductor device and a manufacturing method therefor, and a display and a manufacturing method therefor that can cope with a narrow pitch between terminals and prevent an increase in current density and thermal energy density in a bump connection part. To this end, proposed is an interposer for electrical connection, in which a through-hole is provided in a body made of anodic aluminum oxide film and a first bonding material, an electrically conductive material, and a second bonding material are formed in the through-hole by electroplating. Here, fine trenches having repeated peaks and valleys in the circumferential direction are provided in an outer circumferential surface of a micro-bump.

Abstract: A method for coding image information includes generating prediction information by predicting information on a current coding unit, and determining whether the information on the current coding unit is the same as the prediction information. When the information on the current coding unit is the same as the prediction information, a flag indicating that the information on the current coding unit is the same as the prediction information is coded and transmitted. When the information on the current coding unit is not the same as the prediction information, a flag indicating that the information on the current coding unit is not the same as the prediction information and the information on the current coding unit are coded and transmitted.

Abstract: Disclosed herein is a device for interlocking a display device with a vehicle, the device including a mount disposed in the vehicle, the display device being attached to and detached from the mount, a first sliding member disposed on a front surface of the mount and capable of moving forward or backward in a direction perpendicular to a rear surface of the display device, and a connector provided to the first sliding member, wherein the connector may transmit and receive electrical signals to and from the display device. The vehicle may be controlled by coupling a display device to the interlocking device disposed in the vehicle. Even when the display device is not coupled to the vehicle, the vehicle may be controlled by pairing through wireless communication between the vehicle and the display device.

Abstract: The present invention relates to an apparatus and method for encoding and decoding an image by skip encoding. The image-encoding method by skip encoding, which performs intra-prediction, comprises: performing a filtering operation on the signal which is reconstructed prior to an encoding object signal in an encoding object image; using the filtered reconstructed signal to generate a prediction signal for the encoding object signal; setting the generated prediction signal as a reconstruction signal for the encoding object signal; and not encoding the residual signal which can be generated on the basis of the difference between the encoding object signal and the prediction signal, thereby performing skip encoding on the encoding object signal.

Abstract: An example display device includes a display element having at least one portion which can be changed into a curved shape; and a flexible window member stacked onto the display element, wherein the thickness of a portion of the window member is less than that of the other portions.

Abstract: Provided is an apparatus for estimating a target component, the apparatus including a temperature controller configured to modulate temperature of an object, a measurer configured to measure a spectrum for each temperature of the object that changes based on the modulation, and a processor configured to obtain effective optical pathlength vectors corresponding to a temperature change based on the spectrum for each temperature of the object, obtain a representative effective optical pathlength based on the obtained effective optical pathlength vectors, and obtain a target component estimation model based on the obtained representative effective optical pathlength.

Abstract: A storage device having improved performance includes: a plurality of memory devices, each memory device including a plurality of memory blocks, the plurality of memory devices coupled to a channel; and a memory controller coupled to the channel to be in communication with the plurality of memory devices to provide a read command for instructing a read operation on the plurality of memory blocks to read out data and provide a read enable signal to the memory devices during at least part of an idle time of the channel, which occurs while the read operation is being performed. The plurality of memory devices output first data to the memory controller through the channel in response to the read enable signal, wherein the first data is different from the data previously read out by the read operation that provides the read enable signal in response to the read command.

Abstract: A memory system includes a memory device and a memory controller. The memory controller transmits a data read command to the memory device, inputs N read enable toggle signals to the memory device in order for the memory device to output the data requested by the data read command requests, and inputs an additional read enable toggle signal to the memory device. The memory device outputs status information of the memory device to the memory controller in response to the additional read enable toggle signal.

Abstract: A semiconductor memory device includes a memory cell array, a peripheral circuit, and a control logic. The memory cell array includes a plurality of memory cells. The peripheral circuit performs a read operation on selected memory cells, among the plurality of memory cells. The control logic controls the read operation of the peripheral circuit in response to a read command that is received from an external device and determines whether to perform a discharge operation of word lines that are connected to the plurality of memory cells based on a type of the read command.

Abstract: An example display device includes a display element having at least one portion which can be changed into a curved shape; and a flexible window member stacked onto the display element, wherein the thickness of a portion of the window member is less than that of the other portions.

Abstract: An example display device includes a display element having at least one portion which can be changed into a curved shape; and a flexible window member stacked onto the display element, wherein the thickness of a portion of the window member is less than that of the other portions.

Abstract: Provided herein is a memory device and a storage device including the same. The memory device includes an input/output circuit configured to receive a command, an address, and data from a memory controller. The memory device also includes control logic configured to control a peripheral circuit of the memory device so that an operation of storing the data in a memory cell of the memory device is performed based on the command and the address received from the input/output circuit. The input/output circuit includes a queue layer configured to temporarily store the command and the address and to output the command and the address to the control logic based on at least one of a rising edge and a falling edge of a write enable signal received by the memory device from the memory controller.

Abstract: A storage device having improved performance includes: a plurality of memory devices, each memory device including a plurality of memory blocks, the plurality of memory devices coupled to a channel; and a memory controller coupled to the channel to be in communication with the plurality of memory devices to provide a read command for instructing a read operation on the plurality of memory blocks to read out data and provide a read enable signal to the memory devices during at least part of an idle time of the channel, which occurs while the read operation is being performed. The plurality of memory devices output first data to the memory controller through the channel in response to the read enable signal, wherein the first data is different from the data previously read out by the read operation that provides the read enable signal in response to the read command.

Abstract: A memory system includes a memory device and a memory controller. The memory controller transmits a data read command to the memory device, inputs N read enable toggle signals to the memory device in order for the memory device to output the data requested by the data read command requests, and inputs an additional read enable toggle signal to the memory device. The memory device outputs status information of the memory device to the memory controller in response to the additional read enable toggle signal.

Abstract: Provided herein is a memory device and a storage device including the same. The memory device includes an input/output circuit configured to receive a command, an address, and data from a memory controller. The memory device also includes control logic configured to control a peripheral circuit of the memory device so that an operation of storing the data in a memory cell of the memory device is performed based on the command and the address received from the input/output circuit. The input/output circuit includes a queue layer configured to temporarily store the command and the address and to output the command and the address to the control logic based on at least one of a rising edge and a falling edge of a write enable signal received by the memory device from the memory controller.

Abstract: A memory device includes: a plurality of memory cells; soft read logic configured to generate soft data by reading data from the plurality of memory cells in response to a soft read command from a controller, the soft data including at least a major symbol and at least a minor symbol; a compressor configured to generate compressed data by: encoding, into a code alphabet having a second length, a major source alphabet including repetitions of the major symbol by a first length among a plurality of source alphabets included in the soft data, and encoding, into a code alphabet having a longer length than the second length, a minor source alphabet including repetitions of the major symbol by a shorter length than the first length and ending with one minor symbol; and an interface configured to provide the compressed data to the controller.

Abstract: Provided herein is a semiconductor memory device including a memory cell array, a peripheral circuit, an operation information storage, and control logic. The memory cell array may include a plurality of memory cells. The peripheral circuit may perform a read operation for setup information stored in the memory cell array. The operation information storage may store the setup information. The control logic may control a read operation of the peripheral circuit and a storage operation of the operation information storage. The control logic may control the peripheral circuit and the operation information storage such that a storage section in which the operation information storage stores first setup information and a read section in which the peripheral circuit reads second setup information from the memory cell array are at least partially overlapped with each other.