Patents by Inventor Sung Hun Shin

Sung Hun Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240174083
    Abstract: Disclosed is a console operation device including a base plate, at least one solenoid disposed in the base plate, a guide rail disposed in front of the base plate, and a manipulator mounted on the guide rail to move on the guide rail, wherein the at least one solenoid includes a first magnet having a polarity, wherein the manipulator includes a second magnet having a polarity, wherein the manipulator is configured to be moved based on the polarities of the first and second magnets.
    Type: Application
    Filed: October 11, 2023
    Publication date: May 30, 2024
    Applicant: HYUNDAI MOBIS CO., LTD.
    Inventors: Ji Soo SHIN, Tae Hun KIM, Kyung Hoon KIM, Sung Joon AHN, Shin Jik LEE, Hyun Jun AN
  • Publication number: 20240102745
    Abstract: Heat exchanger comprising a pair of header tanks which are arranged to be spaced apart from each other, a plurality of tubes formed in two columns in the width direction so that both ends are connected to the pair of header tanks, and a plurality of fins interposed between the tubes and coupled to the tubes. The header tank is configured so that a first tank and a second tank are respectively coupled to one header having a central bent portion in the center portion in the width direction, which provides easy assembling of headers and tanks of two heat exchangers. Thermal stress caused by the temperature difference between two heat exchanging media is blocked so that damage to a coupling portion where the two heat exchangers are coupled or a bonding portion formed through brazing can be prevented. Thus, leakage of the heat exchanging medium can be prevented.
    Type: Application
    Filed: May 6, 2022
    Publication date: March 28, 2024
    Inventors: Hong-Young LIM, Sung Hong SHIN, Hyunkeun SHIN, Wontaek LEE, Wi Sam JO, Ji Hun HAN
  • Publication number: 20240100779
    Abstract: Provided is a method for regenerating a tool path on the basis of output data feedback in order to improve 3D printing output reliability. A tool path regeneration system according to an embodiment of the present invention comprises: a slicing unit for configuring a process parameter for 3D printing and performing slicing for 3D model data on the basis of the configured process parameter to generate a job file; and an output unit for performing 3D printing on the basis of the generated job file and collecting output data that is output while the 3D printing is performed, wherein the slicing unit comprises an output data analysis module for performing monitoring on the basis of the output data received from the output unit and determining whether to correct the process parameter on the basis of the result of the monitoring.
    Type: Application
    Filed: November 3, 2021
    Publication date: March 28, 2024
    Applicant: Korea Electronics Technology Institute
    Inventors: Hwa Seon SHIN, Sung Hun PARK, Hye In LEE, Sung Hwan CHUN
  • Patent number: 6713336
    Abstract: A flash memory device having improved gate capacitive coupling ratio between a floating gate and a control gate and a fabrication method therefor. The disclosed flash memory device comprises a semiconductor substrate having a first trench with a width including an active region and an isolation region at either side thereof; an isolation layer formed on the isolation regions of the first trench; a second trench in the first trench defined by the isolation layer and exposing only the active region; a groove-shaped floating gate formed on the surface of the second trench and having a tunnel oxide layer on the lower part thereof; a control gate formed on the floating gate and having a gate insulating layer on the lower part thereof; a source region and a drain region formed in the substrate at both sides of the floating gate; and metal wirings formed to be in contact with the source and drain regions, respectively, through the isolation layer on the substrate.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: March 30, 2004
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sung Hun Shin, Jae Doo Eom
  • Patent number: 6627943
    Abstract: A flash memory device having improved gate capacitive coupling ratio between a floating gate and a control gate and a fabrication method therefor. The disclosed flash memory device comprises a semiconductor substrate having a first trench with a width including an active region and an isolation region at either side thereof; an isolation layer formed on the isolation regions of the first trench; a second trench in the first trench defined by the isolation layer and exposing only the active region; a groove-shaped floating gate formed on the surface of the second trench and having a tunnel oxide layer on the lower part thereof; a control gate formed on the floating gate and having a gate insulating layer on the lower part thereof; a source region and a drain region formed in the substrate at both sides of the floating gate; and metal wirings formed to be in contact with the source and drain regions, respectively, through the isolation layer on the substrate.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: September 30, 2003
    Assignee: Hynix Semiconductor Inc
    Inventors: Sung Hun Shin, Jae Doo Eom
  • Publication number: 20030164518
    Abstract: A flash memory device having improved gate capacitive coupling ratio between a floating gate and a control gate and a fabrication method therefor. The disclosed flash memory device comprises a semiconductor substrate having a first trench with a width including an active region and an isolation region at either side thereof; an isolation layer formed on the isolation regions of the first trench; a second trench in the first trench defined by the isolation layer and exposing only the active region; a groove-shaped floating gate formed on the surface of the second trench and having a tunnel oxide layer on the lower part thereof; a control gate formed on the floating gate and having a gate insulating layer on the lower part thereof; a source region and a drain region formed in the substrate at both sides of the floating gate; and metal wirings formed to be in contact with the source and drain regions, respectively, through the isolation layer on the substrate.
    Type: Application
    Filed: February 27, 2003
    Publication date: September 4, 2003
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Sung Hun Shin, Jae Doo Eom
  • Publication number: 20030052359
    Abstract: A flash memory device having improved gate capacitive coupling ratio between a floating gate and a control gate and a fabrication method therefor. The disclosed flash memory device comprises a semiconductor substrate having a first trench with a width including an active region and an isolation region at either side thereof; an isolation layer formed on the isolation regions of the first trench; a second trench in the first trench defined by the isolation layer and exposing only the active region; a groove-shaped floating gate formed on the surface of the second trench and having a tunnel oxide layer on the lower part thereof; a control gate formed on the floating gate and having a gate insulating layer on the lower part thereof; a source region and a drain region formed in the substrate at both sides of the floating gate; and metal wirings formed to be in contact with the source and drain regions, respectively, through the isolation layer on the substrate.
    Type: Application
    Filed: December 7, 2001
    Publication date: March 20, 2003
    Inventors: Sung Hun Shin, Jae Doo Eom
  • Patent number: 6391717
    Abstract: There is disclosed a method of manufacturing a flash memory device. In order to solve the problem that the coupling ratio of a gate electrode is low in a stack gate-type flash memory device, the present invention allows a control gate to surround a control gate from its to its bottom. Therefore, the present invention can increase the contact area of the floating gate and the control gate and can also increase the coupling ratio of the gate electrode.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: May 21, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Sung Hun Shin, Byung Hee Cho, Ki Jun Kim