Patents by Inventor Sungjae Ohn

Sungjae Ohn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Three-phase, three-level inverters and methods for performing soft switching with phase synchronization
    Patent number: 10886860
    Abstract: A three-phase, N-level inverter and method are disclosed. A circuit topology of the inverter comprises first, second and third sets of switches and first, second and third inductors. Each switch comprises at least first, second and third terminals, the first terminals being control terminals. The first terminals of the first, second and third inductors are electrically coupled to the first, second and third sets of switches, respectively. A current controller performs a control algorithm that causes it to output first, second and third sets of gating signals to the control terminals of the switches of the first, second and third sets of switches, respectively, to cause them to be placed in an on state or an off state in a particular sequence to perform zero voltage switching while maintaining synchronization of the three phases of the three-phase, N-level inverter.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: January 5, 2021
    Assignee: Virginia Tech Intellectual Properties, Inc.
    Inventors: Nidhi Haryani, Sungjae Ohn, Rolando Burgos, Dushan Boroyevich
  • THREE-PHASE, THREE-LEVEL INVERTERS AND METHODS FOR PERFORMING SOFT SWITCHING WITH PHASE SYNCHRONIZATION
    Publication number: 20200373853
    Abstract: A three-phase, N-level inverter and method are disclosed. A circuit topology of the inverter comprises first, second and third sets of switches and first, second and third inductors. Each switch comprises at least first, second and third terminals, the first terminals being control terminals. The first terminals of the first, second and third inductors are electrically coupled to the first, second and third sets of switches, respectively. A current controller performs a control algorithm that causes it to output first, second and third sets of gating signals to the control terminals of the switches of the first, second and third sets of switches, respectively, to cause them to be placed in an on state or an off state in a particular sequence to perform zero voltage switching while maintaining synchronization of the three phases of the three-phase, N-level inverter.
    Type: Application
    Filed: May 20, 2019
    Publication date: November 26, 2020
    Inventors: Nidhi Haryani, Sungjae Ohn, Rolando Burgos, Dushan Boroyevich