Abstract: Provided is an image processing device configured to compress first image data. The image processing device includes an encoding circuit configured to compress the first image data into second image data including prediction data and residual data, compress the second image data into third image data by performing entropy encoding on the second image data, generate a header representing a compression ratio of the third image data, and store the third image data along with the header in a memory device as compressed first image data.

Abstract: Provided are a method for generating a summary and a system therefor. The method according to some embodiments may include calculating a likelihood loss for a summary model using a first text sample and a first summary sentence corresponding to the first text sample, calculating an unlikelihood loss for the summary model using a second text sample and the first summary sentence, the second text sample being a negative sample generated from the first text sample, and updating the summary model based on the likelihood loss and the unlikelihood loss.

Abstract: A display device may include: a substrate including a display area and a non-display area; and pixels in the display area, and each including sub-pixels. Each sub-pixel may include a pixel circuit layer, and a display element layer including at least one light emitting element. The display element layer may include: a first electrode on the pixel circuit layer; a second electrode on the first electrode and electrically insulated from the first electrode; the light emitting element including a first end portion coupled to the first electrode and a second end portion coupled to the second electrode, and between the first electrode and the second electrode; an intermediate layer enclosing at least one area of the light emitting element, and on the first electrode; a connection line electrically connected to the second electrode. The second electrode may be on the intermediate layer.

Abstract: A display device comprises a first electrode, a second electrode disposed to be spaced apart from the first electrode and face the first electrode, a first insulating layer disposed to cover the first electrode and the second electrode, a second insulating layer disposed on at least a part of the first insulating layer and exposing at a part of a region where the first electrode and the second electrode overlaps the first insulating layer and at least one light emitting element on the exposed first insulating layer between the first electrode and the second electrode, wherein the second insulating layer includes at least one opening exposing the first insulating layer and disposed to be spaced apart from each other on a region where the first electrode and the second electrode face each other, and a bridge portion between the openings, and the light emitting element is disposed on the opening.

Abstract: A display device includes a first electrode and a second electrode that are spaced apart from and facing each other; a light-blocking layer disposed above the first electrode and the second electrode; and at least one light-emitting element disposed between the first electrode and the second electrode. The light-blocking layer includes a light-blocking portion absorbing light and an opening pattern. The light-blocking portion includes an area partially overlapping the first electrode and the second electrode. The at least one opening pattern exposes portions of the first and second electrodes facing each other and at least a portion of an area between the first and second electrodes facing each other. The at least one light-emitting element overlaps the at least one opening pattern.

Abstract: Methods of forming semiconductor switching devices having trench-gate electrodes include the steps of implanting base region dopants of second conductivity type into a semiconductor substrate to define a preliminary base region therein. A step is then performed to form a trench having sidewalls which extend through the preliminary base region. A sacrificial insulating layer is then formed on the sidewalls of the trench while the implanted base region dopants are simultaneously diffused into the region of first conductivity type. The sacrificial insulating layer is then removed. Next, a gate electrode insulating layer is formed on the sidewalls and on a bottom of the trench. A gate electrode is then formed on the gate electrode insulating layer. Dopants of first conductivity type are then implanted into the semiconductor substrate to define a preliminary source region, which forms a P-N junction with the implanted base region dopants, and into the gate electrode to improve the conductivity thereof.