Patents by Inventor SUNGUP MOON

SUNGUP MOON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory system including DRAM cache and cache management method thereof
    Patent number: 11023396
    Abstract: A memory system includes a nonvolatile memory electrically connected to a data bus, a DRAM electrically connected to the data bus, and a memory controller configured to drive the DRAM as a cache memory and the nonvolatile memory as a main memory and to synchronize data of a cache line with data of the nonvolatile memory in units of cache units based on a dirty flag. The DRAM is configured to load data of the cache line that caches data stored in the nonvolatile memory and to store the dirty flag, which indicates whether a cache unit is dirty, in units of cache units, where a size of each cache unit is smaller than a size of the cache line.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: June 1, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungup Moon, Tae-Kyeong Ko, Do-Han Kim, Jongmin Park, Kyoyeon Won
  • MEMORY SYSTEM INCLUDING DRAM CACHE AND CACHE MANAGEMENT METHOD THEREOF
    Publication number: 20190347224
    Abstract: A memory system includes a nonvolatile memory electrically connected to a data bus, a DRAM electrically connected to the data bus, and a memory controller configured to drive the DRAM as a cache memory and the nonvolatile memory as a main memory and to synchronize data of a cache line with data of the nonvolatile memory in units of cache units based on a dirty flag. The DRAM is configured to load data of the cache line that caches data stored in the nonvolatile memory and to store the dirty flag, which indicates whether a cache unit is dirty, in units of cache units, where a size of each cache unit is smaller than a size of the cache line.
    Type: Application
    Filed: July 23, 2019
    Publication date: November 14, 2019
    Inventors: SUNGUP MOON, Tae-Kyeong Ko, Do-Han Kim, Jongmin Park, Kyoyeon Won
  • Memory system including DRAM cache and cache management method thereof
    Patent number: 10366021
    Abstract: A memory system includes a nonvolatile memory electrically connected to a data bus, a DRAM electrically connected to the data bus, and a memory controller configured to drive the DRAM as a cache memory and the nonvolatile memory as a main memory and to synchronize data of a cache line with data of the nonvolatile memory in units of cache units based on a dirty flag. The DRAM is configured to load data of the cache line that caches data stored in the nonvolatile memory and to store the dirty flag, which indicates whether a cache unit is dirty, in units of cache units, where a size of each cache unit is smaller than a size of the cache line.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: July 30, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungup Moon, Tae-Kyeong Ko, Do-Han Kim, Jongmin Park, Kyoyeon Won
  • Multi-communication device in a memory system
    Patent number: 9934830
    Abstract: In a memory module including a memory device and a filter, the memory device operates with a clock of a reference frequency. The filter receives a multiplexed signal from a host and filters a signal of a frequency band from the multiplexed signal. The frequency band includes the reference frequency and the signal of the frequency band is provided to the memory device.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: April 3, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jongmin Park, Tae-Kyeong Ko, Do-Han Kim, Sungup Moon, Kyoyeon Won
  • MEMORY SYSTEM INCLUDING DRAM CACHE AND CACHE MANAGEMENT METHOD THEREOF
    Publication number: 20170192888
    Abstract: A memory system includes a nonvolatile memory electrically connected to a data bus, a DRAM electrically connected to the data bus, and a memory controller configured to drive the DRAM as a cache memory and the nonvolatile memory as a main memory and to synchronize data of a cache line with data of the nonvolatile memory in units of cache units based on a dirty flag. The DRAM is configured to load data of the cache line that caches data stored in the nonvolatile memory and to store the dirty flag, which indicates whether a cache unit is dirty, in units of cache units, where a size of each cache unit is smaller than a size of the cache line.
    Type: Application
    Filed: December 23, 2016
    Publication date: July 6, 2017
    Inventors: SUNGUP MOON, TAE-KYEONG KO, DO-HAN KIM, JONGMIN PARK, KYOYEON WON
  • MULTI-COMMUNICATION DEVICE IN A MEMORY SYSTEM
    Publication number: 20170140798
    Abstract: In a memory module including a memory device and a filter, the memory device operates with a clock of a reference frequency. The filter receives a multiplexed signal from a host and filters a signal of a frequency band from the multiplexed signal. The frequency band includes the reference frequency and the signal of the frequency band is provided to the memory device.
    Type: Application
    Filed: October 20, 2016
    Publication date: May 18, 2017
    Inventors: JONGMIN PARK, TAE-KYEONG KO, DO-HAN KIM, SUNGUP MOON, KYOYEON WON