Abstract: A method for forming a gapfill layer, comprising: positioning a substrate in a processing volume of a processing chamber, forming a plurality of first gapfill layers in at least one feature disposed on the substrate, comprising, for each first gapfill layer included in the plurality of first gapfill layers: forming a layer in the at least one feature by flowing a first hydrocarbon precursor gas into the processing volume and etching the layer by flowing a first etchant gas into the processing volume, and forming a second gapfill layer in the at least one feature by co-flowing a second hydrocarbon precursor gas and a second etchant gas into the processing volume.

Abstract: In some embodiments, a method includes positioning a substrate structure into a processing volume of a process chamber. The method further includes flowing a hydrocarbon precursor having C2H2 into the processing volume of the processing chamber at a precursor flow rate of about 400 sccm to about 800 sccm. The method further includes flowing an etchant gas having NH3 into the processing volume of the processing chamber at an etchant gas flow rate of about 0.1 sccm to about 250 sccm. The method further includes providing a high frequency radio frequency (HFRF) power of about 700 W to about 1500 W to the processing volume to generate a RF in the processing volume of the processing chamber. The method further includes forming a carbon based plugfill layer over the surface of the substrate structure and a carbon based plug within the feature of the substrate structure.

Abstract: Semiconductor processing chambers and systems, as well as methods of cleaning such chambers and systems are provided. Processing chambers and systems include a chamber body that defines a processing region. Processing chambers and systems include an enhancement liner positioned within the chamber body that includes an interior portion, an exterior portion, and a plurality of apertures. The enhancement liner defines a liner volume between the interior portion and the exterior portion, and a distribution gap is defined between the enhancement liner and a sidewall of the chamber body. Processing chambers and systems include a faceplate disposed vertically above the enhancement liner. Processing chambers and systems include a cleaning gas source coupled with distribution gap through an inlet in the sidewall of the chamber body.

Abstract: Exemplary processing methods may include forming a plasma of a cleaning precursor in a remote region of a semiconductor processing chamber. The methods may include flowing plasma effluents of the cleaning precursor into a processing region of the semiconductor processing chamber. The methods may include contacting a substrate support with the plasma effluents for a first period of time. The methods may include lowering the substrate support from a first position to a second position while continuing to flow plasma effluents of the cleaning precursor. The methods may include cleaning the processing region of the semiconductor processing chamber for a second period of time.

Abstract: A component, system, and method for improved foreline cleaning of semiconductor chambers and components are disclosed herein. In one example, a processing chamber component includes a foreline constructed from stainless steel having a circular cross sectional shape and an inner surface. The foreline further includes a first end configured to couple to a processing chamber, a second end configured to couple to a valve, and a coating disposed within the inner surface of the foreline, the coating having a thickness between about 150 nanometers and about 525 nanometer. Further, the first end includes a first flange, the second end comprises a second flange, wherein the first end and the second end are coupled by a bend. Further, the coating has properties configured to reduce depositions within the foreline.

Abstract: Semiconductor processing chambers and systems, as well as methods of cleaning such chambers and systems are provided. Processing chambers and systems include a chamber body that defines a processing region, a liner positioned within the chamber body that defines a liner volume, a faceplate positioned atop the liner, a substrate support disposed within the chamber body, and a cleaning gas source coupled with the liner volume through a cleaning gas plenum and one or more inlet apertures. Systems and chambers include where at least one of the one or more inlet apertures is disposed in the processing region between the faceplate and a bottom wall of the chamber body.

Abstract: Exemplary semiconductor processing systems may include a chamber body including sidewalls and a base. The system may include a substrate support extending through the base of the chamber body. The chamber body may define an access circumferentially extending about the substrate support at the base of the chamber body. The system may include one or more isolators disposed within the chamber body. The one or more isolators may define an exhaust path between the one or more isolators and the chamber body. The exhaust path may extend to the base of the chamber body. The systems may include a fluid source fluidly coupled with the chamber body at the access extending about the substrate support.

Abstract: Exemplary semiconductor processing systems may include a chamber body including sidewalls and a base. The system may include a substrate support extending through the base of the chamber body. The chamber body may define an access circumferentially extending about the substrate support at the base of the chamber body. The system may include one or more isolators disposed within the chamber body. The one or more isolators may define an exhaust path between the one or more isolators and the chamber body. The exhaust path may extend to the base of the chamber body. The systems may include a fluid source fluidly coupled with the chamber body at the access extending about the substrate support.

Abstract: In one or more embodiments, a method for depositing a carbon hard-mask material by plasma-enhanced chemical vapor deposition (PECVD) includes heating a substrate contained within a process chamber to a temperature in a range from about 100° C. to about 700° C. and producing a plasma with a power generator emitting an RF power of greater than 3 kW. In some examples, the temperature is in a range from about 300° C. to about 700° C. and the RF power is greater than 3 kW to about 7 kW. The method also includes flowing a hydrocarbon precursor into the plasma within the process chamber and forming a carbon hard-mask layer on the substrate at a rate of greater than 5,000 ?/min, such as up to about 10,000 ?/min or faster.

Abstract: Exemplary semiconductor processing systems may include a chamber body including sidewalls and a base. The chamber body may define an interior volume. The processing systems may include a substrate support extending through the base of the chamber body. The substrate support may be configured to support a substrate within the interior volume. The processing systems may include a faceplate positioned within the interior volume of the chamber body. The faceplate may define a plurality of apertures through the faceplate. The processing systems may include a faceplate heater seated on the faceplate. The faceplate heater may include a first heater coil extending proximate a first area of the faceplate. The faceplate heater may include a second heater coil extending proximate a second area of the faceplate.

Abstract: In one or more embodiments, a method for depositing a carbon hard-mask material by plasma-enhanced chemical vapor deposition (PECVD) includes heating a substrate contained within a process chamber to a temperature in a range from about 100 C to about 700 C and producing a plasma with a power generator emitting an RF power of greater than 3 kW. In some examples, the temperature is in a range from about 300 C to about 700 C and the RF power is greater than 3 kW to about 7 kW. The method also includes flowing a hydrocarbon precursor into the plasma within the process chamber and forming a carbon hard-mask layer on the substrate at a rate of greater than 5,000/min, such as up to about 10,000/min or faster.

Abstract: Exemplary semiconductor processing chambers may include a chamber body having sidewalls and a base. The chambers may include a pumping liner seated atop the chamber body. The pumping liner may at least partially define an annular pumping plenum and at least one exhaust aperture that fluidly couples the pumping plenum with an interior of the chamber body. The chambers may include a purge ring seated below the pumping liner. The purge ring may define an annular channel that extends about a body of the purge ring. The purge ring may define a gas inlet that is fluidly coupled with the annular channel. The purge ring may define purge ports that are disposed at different radial positions about the purge ring, each of the purge ports being aligned and in fluid communication with the pumping plenum. The chambers may include a purge gas source coupled with the gas inlet.

Abstract: Aspects of the present disclosure relate generally to pedestals, components thereof, and methods of using the same for substrate processing chambers. In one implementation, a pedestal for disposition in a substrate processing chamber includes a body. The body includes a support surface. The body also includes a stepped surface that protrudes upwards from the support surface. The stepped surface is disposed about the support surface to surround the support surface. The stepped surface defines an edge ring such that the edge ring is integrated with the pedestal to form the body that is monolithic. The pedestal also includes an electrode disposed in the body, and one or more heaters disposed in the body.

Abstract: A processing system comprises a chamber body, a substrate support and a lid assembly. The substrate support is located in the chamber body and comprises a first electrode. The lid assembly is positioned over the chamber body and defines a processing volume. The lid assembly comprises a faceplate, a second electrode positioned between the faceplate and the chamber body, and an insulating member positioned between the second electrode and the processing volume. A power supply system is coupled to the first electrode and the faceplate and is configured to generate a plasma in the processing volume.

Abstract: Exemplary processing methods may include forming a plasma of a cleaning precursor in a remote region of a semiconductor processing chamber. The methods may include flowing plasma effluents of the cleaning precursor into a processing region of the semiconductor processing chamber. The methods may include contacting a substrate support with the plasma effluents for a first period of time. The methods may include lowering the substrate support from a first position to a second position while continuing to flow plasma effluents of the cleaning precursor. The methods may include cleaning the processing region of the semiconductor processing chamber for a second period of time.

Abstract: Exemplary methods of treating a chamber may include delivering a cleaning precursor to a remote plasma unit. The methods may include forming a plasma of the cleaning precursor. The methods may include delivering plasma effluents of the cleaning precursor to a processing region of a semiconductor processing chamber. The processing region may be defined by one or more chamber components. The one or more chamber components may include an oxide coating. The methods may include halting delivery of the plasma effluents. The methods may include treating the oxide coating with a hydrogen-containing material delivered to the processing region subsequent halting delivery of the plasma effluents.

Abstract: Aspects of the present disclosure relate generally to pedestals, components thereof, and methods of using the same for substrate processing chambers. In one implementation, a pedestal for disposition in a substrate processing chamber includes a body. The body includes a support surface. The body also includes a stepped surface that protrudes upwards from the support surface. The stepped surface is disposed about the support surface to surround the support surface. The stepped surface defines an edge ring such that the edge ring is integrated with the pedestal to form the body that is monolithic. The pedestal also includes an electrode disposed in the body, and one or more heaters disposed in the body.

Abstract: Exemplary processing methods may include forming a plasma of a cleaning precursor in a remote region of a semiconductor processing chamber. The methods may include flowing plasma effluents of the cleaning precursor into a processing region of the semiconductor processing chamber. The methods may include contacting a substrate support with the plasma effluents for a first period of time. The methods may include lowering the substrate support from a first position to a second position while continuing to flow plasma effluents of the cleaning precursor. The methods may include cleaning the processing region of the semiconductor processing chamber for a second period of time.

Abstract: Exemplary processing chambers may include a body having sidewalls and a bottom plate. The bottom plate may define an exhaust opening and a gas inlet. The chambers may include a faceplate seated atop the body. The chambers may include a purge ring seated atop the bottom plate. The purge ring may include a ring body having an outer edge and an inner edge defining an open interior. The ring body may have a surface disposed against the bottom plate. The ring body may define an opening aligned with the exhaust opening. The surface may define a fluid port aligned and coupled with the gas inlet. The surface may define arcuate grooves extending into the fluid port. The arcuate grooves may be parallel with the inner and outer edges. The surface may define radial grooves extending from the open interior to an arcuate groove.

Abstract: Exemplary semiconductor processing chambers may include a chamber body including sidewalls and a base. The chambers may include a substrate support extending through the base of the chamber body. The substrate support may include a support platen configured to support a semiconductor substrate. The substrate support may include a shaft coupled with the support platen. The substrate support may include a shield coupled with the shaft of the substrate support. The shield may include a plurality of apertures defined through the shield. The substrate support may include a block seated in an aperture of the shield.